Slok Shah

Address: *** * *** ******** **., San Jose CA 95112 Email: ac2n9t@r.postjobfree.com

Mobile: 267-***-**** LinkedIn: https://www.linkedin.com/in/slokshah/ OBJECTIVE: Seeking a challenging position in ASIC Designing ACADEMIC QUALIFICATION

Master of Science, Computer Engineering, Drexel University, Philadelphia, PA, USA. Graduated: June 2017 Courses: ASIC Design, Dependable Computing, Web Security, Advance Programming, High Performance & Parallel Computer Architecture, Microwave Active Subsystems, Custom VLSI Design, Computing in the small, SystemVerilog. Bachelor of Engineering, Electronics Engineering, University of Mumbai, Maharashtra, India. June 2014 TECHNICAL SKILLS

• Programming: SystemVerilog, C, C++, HTML, CSS, MATLAB.

• Scripting: JavaScript, Python, Perl and Shell.

• Multi-threading: Pthreads, OpenMP, and Cuda.

• Functional: Static Timing Analysis, High performance computation, Parallel Programming and Web Development, DRC, LVS, PEX, Layout Design, OVM, UVM (Basics).

• Operating Systems: Windows, Linux and Raspbian.

• Tools: Cadence Virtuoso, Synopsys Primetime, Atom, VCS, ModelSim, Wireshark, LabVIEW. PROFESSIONAL EXPERIENCE

ASIC Verification Trainee, Verifast Technologies, San Jose, CA Sept 2016 – June 2017

• Designed a filer based self-checking verification environment with driver, monitor and checker modules. Verified for UART protocols. Developed a PERL script to launch regression tests and analyze the results using System Verilog.

Teaching Assistant, Drexel University, Philadelphia, PA Sept 2016 – June 2017

• Assisted laboratory for undergraduate courses like ENGR 201- Evaluation and Presentation of experimental data I

& II. Explained effectively, the basics of MS Excel, MATLAB, LabVIEW. Undergraduate Internship, RiDDL, Mumbai, India January 2013 – August 2013

• Facilitated in projects and helped to commercialize the project. Interactive staircase and Eco-mappers. Configured control systems and sensors to collect data about dust, pollution and noise levels around the city. Helped developed the project website using tools such as HTML, CSS and JavaScript. ACADEMIC PROJECT September 2015 – June 2017

• OpenSparc T1-DC Synthesis and Design Planning using Synopsys Primetime: Performed DC Synthesis on OpenSparc T1 FPU using design compiler and IC compiler tools for 90nm. Successfully conducted Static timing analysis using primetime. Running the processor on as low as 2ns period and a relatively low power consumption. Implemented the back-end of IC design flow range, including logic synthesis, floor planning, placement, clock tree synthesis, routing and verification. Performed power and timing optimization. Synthesized OpenSparc T1 FPU using cadence encounter. Performed Parasitic extraction using PEX.

• Pico Processor based on MIPS architecture: Designed and implemented 8-bit Pico Processor based on MIPS/RISC architecture. Used 9500 transistors. Performed schematic and layout design using Cadence Virtuoso and successfully completed LVS and DRC checks. Implemented the Program counter, register bank, and ALU in Verilog RTL.

• Modeling a Two-Level Power Distribution Network: The primary objective of this project was to design two level power distribution networks consisting of a Global PDN and six Local PDNs. The local PDNs were designed with a specific power budget. Tools: Cadence Virtuoso.

• Parallelization of Mathematical Algorithms: Simulated benchmarks and evaluated the performance impact on a processor by varying cache sizes using gem5. Observed speedup in parallel versions over serial versions in multi core systems by performing parallel threaded matrix-matrix multiplication using Pthreads, OpenMP and CUDA. Parallelization and code optimization of Gaussian elimination. Programming Language: C

• Cache Simulator: Developed a multilevel basic cache simulator, that returns read-write hit and miss rate of the cache. The purpose of the project was to understand the use of multithreading to run processes faster. Perl bench and bzip benchmarks used for the analysis. Programming Language: C++

• Raspberry Pi Based Smart Temperature/Noise Monitoring System: Remotely measure temperature and noise using Raspberry Pi with live data logging and graph plotting on National Instruments’ LabView. Operating system used: Raspbian C. Programming Language: Python.

Awards: Best Paper Award- Automation in Surgery at Intercollege festival, Dean’s Scholarship for MS Admission.