| Resume alert | Resumes 71 - 80 of 105 |
Engineer Project
Chino, CA
... FPGA: Altera Quartus VHDL. - Simulator: CCS DSP Simulator, MetalLink 8051 Simulator, MPLAB Simulator - Software: Cadence Allegro, OrCAD CIS, Labview, Mathlab, Borland C++, Visual C++, Visual Studio, Photoshop/Impact - Worked with MCU: Atmel AT89C51, ... - 2013 Jul 12
... FPGA: Altera Quartus VHDL. - Simulator: CCS DSP Simulator, MetalLink 8051 Simulator, MPLAB Simulator - Software: Cadence Allegro, OrCAD CIS, Labview, Mathlab, Borland C++, Visual C++, Visual Studio, Photoshop/Impact - Worked with MCU: Atmel AT89C51, ... - 2013 Jul 12
Engineer Design
Diamond Bar, CA, 91765
... CIS, Cadence Virtuoso, VHDL, Xilinx FPGA design and programming - Software: Assembly Language, C, C++, Matlab, Eagle Cad, LabVIEW, Verilog VHDL - Typing speed of 93 wpm - Capable of C++ Programming - Fluent in French, English, Mandarin, Dutch - 2013 Apr 19
... CIS, Cadence Virtuoso, VHDL, Xilinx FPGA design and programming - Software: Assembly Language, C, C++, Matlab, Eagle Cad, LabVIEW, Verilog VHDL - Typing speed of 93 wpm - Capable of C++ Programming - Fluent in French, English, Mandarin, Dutch - 2013 Apr 19
Electrical Engineering
Irvine, CA
... PROFESSIONAL SKILLS Computer Skills Operating systems: Linux and Windows High-level programming languages: MATLAB, Maple, C/C++, Java FPGA programming: Verilog and VHDL Circuit and PCB design: Protel, Pspise, Orcad and Cadence Network Programming: ... - 2013 Feb 18
... PROFESSIONAL SKILLS Computer Skills Operating systems: Linux and Windows High-level programming languages: MATLAB, Maple, C/C++, Java FPGA programming: Verilog and VHDL Circuit and PCB design: Protel, Pspise, Orcad and Cadence Network Programming: ... - 2013 Feb 18
Customer Service Assistant
Chino Hills, CA
... ENGINEERING Signal Processing: Matlab/Octave, Multimedia Coding, DSP Algorithms SKILLS FFT/DCT, CDMA, LDPC, FIR Filters, Nyquist Filters, Huffman Encoding Digital Design: Cadence, Synopsys, Verilog/VHDL, SPICE, VLSI, FPGA Nanosim, Hspice, NCVerilog, ... - 2013 Jan 04
... ENGINEERING Signal Processing: Matlab/Octave, Multimedia Coding, DSP Algorithms SKILLS FFT/DCT, CDMA, LDPC, FIR Filters, Nyquist Filters, Huffman Encoding Digital Design: Cadence, Synopsys, Verilog/VHDL, SPICE, VLSI, FPGA Nanosim, Hspice, NCVerilog, ... - 2013 Jan 04
Electrical Engineering Student
La Puente, CA, 91744
... Asynchronous Communication Establish asynchronous communication between PIC18 microcontroller to FPGA using SPI module; Using RS232 cable; establish communication between FPGA and PC Lab-View. COMPUTER SKILLS MPLAB(2-3yrs); PSPICE(2-3yrs); Xilinx ... - 2012 Dec 16
... Asynchronous Communication Establish asynchronous communication between PIC18 microcontroller to FPGA using SPI module; Using RS232 cable; establish communication between FPGA and PC Lab-View. COMPUTER SKILLS MPLAB(2-3yrs); PSPICE(2-3yrs); Xilinx ... - 2012 Dec 16
Engineer Customer Service
La Puente, CA, 91016
... Performed FPGA board failure analysis, reported findings to SD engineering and made suggestions for improvement. Root cause failure analysis on Multitest flip table flex cables. Reported findings to SD and Multitest for engineering action to be ... - 2012 Oct 25
... Performed FPGA board failure analysis, reported findings to SD engineering and made suggestions for improvement. Root cause failure analysis on Multitest flip table flex cables. Reported findings to SD and Multitest for engineering action to be ... - 2012 Oct 25
Engineer Design
Fullerton, CA
... Interface ADC, SRAM, LCD and FPGA: RTL design and verification - Verilog, Xilinx ISE Designed hardware to Interface 16x2 LCD, 32K SRAM and 8 -bit ADC to FPGA and modeled finit state machine for writing data of ADC to all address of SRAM and read ... - 2012 Oct 20
... Interface ADC, SRAM, LCD and FPGA: RTL design and verification - Verilog, Xilinx ISE Designed hardware to Interface 16x2 LCD, 32K SRAM and 8 -bit ADC to FPGA and modeled finit state machine for writing data of ADC to all address of SRAM and read ... - 2012 Oct 20
Software Engineer Project
Irvine, CA, 92612
... Having an accumulated work experience of 6 yrs in the areas of o ASIC/FPGA Design o Review of Functional and Test Specifcations o Creation of Technical Design Specification and review of design created by peers o Coding and code reviews o Mentoring ... - 2012 Oct 15
... Having an accumulated work experience of 6 yrs in the areas of o ASIC/FPGA Design o Review of Functional and Test Specifcations o Creation of Technical Design Specification and review of design created by peers o Coding and code reviews o Mentoring ... - 2012 Oct 15
Design Engineer
Irvine, CA
... Shanghai Jiao Tong University, Shanghai, China Lecturer FPGA Training Class. Jun.2006 Gave lecture to a half-day workshop for embedded system design by using the Embedded Development Kit of Xilinx FPGA. Designed the lab experiments. Teaching ... - 2012 Oct 10
... Shanghai Jiao Tong University, Shanghai, China Lecturer FPGA Training Class. Jun.2006 Gave lecture to a half-day workshop for embedded system design by using the Embedded Development Kit of Xilinx FPGA. Designed the lab experiments. Teaching ... - 2012 Oct 10
Electrical Engineer Customer Service
Long Beach, CA
... Experience Experience in design, assembly, and troubleshooting of the following: Motion control systems, Data Acquisition, Thermal control systems, Lasers, Opto-electronics, Linear circuits, FPGA’s, Digital Circuits, PLD’s, Microprocessors, PCB ... - 2012 Oct 04
... Experience Experience in design, assembly, and troubleshooting of the following: Motion control systems, Data Acquisition, Thermal control systems, Lasers, Opto-electronics, Linear circuits, FPGA’s, Digital Circuits, PLD’s, Microprocessors, PCB ... - 2012 Oct 04