Engineer Project
Resume:
Ernie Yang-An Tan
*********@*****.***
***** ***** **** **. ***** Hills, CA 91709
OBJECTIVE
An electrical/embedded system engineer career opportunity in the fields of
circuit design, firmware developing, and device characterization analysis
programming with my knowledge and industry experience.
EDUCATION
Master of Science in Electrical Engineering, University of California,
Riverside July 2007
- Master Degree Graduate Project: Ambient Temperature Effects of
Performance of AlGaN/GaN Field-Effect Transistors
Candidate of Embedded System Engineering Certificate, University of
California, Irvine, July 2012
- Embedded Systems Architecture
- Fundamentals of Embedded Systems
- Real-Time Embedded Systems Programming
- Embedded Systems Design Using ARM
SUMMARY
Enhanced with 6 years experience in professional R&D of microprocessor-
based products. Proficiency with development of customized products that
need flexible hierarchical design flow in short period. Specialized skills
in precision ADC/DAC Control, high speed Data Acquisition, Process Control
(DCS & SCADA), and DC/Step Motor applications. Self motivated to keep
completing my skills and knowledge by pursuing Engineering Certificate of
UC, Irvine.
SKILLS
- Programming Languages: C/C++, Assembly, LabView, VHDL, Fortrain.
- Compiler: MCU: IAR C, Keil C/C++/Asm, Dynamic C, AVR Studio, MPLab
IDE C, Intel Fortrain.
DSP: TI CCStudio C/C++.
FPGA: Altera Quartus VHDL.
- Simulator: CCS DSP Simulator, MetalLink 8051 Simulator, MPLAB Simulator
- Software: Cadence Allegro, OrCAD CIS, Labview, Mathlab, Borland C++,
Visual C++, Visual Studio, Photoshop/Impact
- Worked with MCU: Atmel AT89C51, AT89C512, AT89C52,
STC MCU STC89C, STC11F, STC12C,
Rabbitcore RCM3700, RCM6700,
TI TMS370.
Microchip PIC18F2xxx, PIC18F4xx, PIC12F6xx
- Worked with DSP: TI TMS320C6000, TMS320C5000, TMS320C2000.
- Worked with FPGA: Altera EP3C16, EP3C40, EP3C25.
- Familiar with MCU: Atmel AVR RISC ATME2560,
TI ARM RISC LM3S811 32/64 bit.
- Project Experience: ADC/DAC control, I/O, UART, RS232, SCPI IEEE488.2,
BSP, IEEE 802.15.4 2.4GHz
Bluetooth/Wireless Protocol, UI/GUI engineering, DLL
driver, and QC test program.
- Languages: Proficient in English, Chinese
RELATED WORK EXPERIENCE
Full Time
Firmware Engineer (July. 2009 - Now)
Company: General Photonics Corp., California, USA
- New concept quick research, design, project planning, and schedule.
- Designed MCU/DSP/FPGA system for high speed communication, measurement,
ADC/DAC control and GUI.
- Developed firmware for multiple chip/processor unit for real-time data
processing, communicating, and calculating.
- Designed algorithm for accurate optical data/signal control(Polarization
Control) through ADC feedback to DAC output system.
- Developed menu driven user interface for data control system(DCS) on an
OLED/LCD.
- Developed control program(Labview, VC executable, or DLL) for products
control, PWM, Poincare Sphere and measuring result display.
- Experience with I/O control, RF module, integrated PCB multi-layer
circuit Design for low impedance and noise level.
- Experience with High speed communication in RS232, USB, GPIB, and
Ethernet protocol.
- Created SCPI IEEE488.2 controlling/monitoring instrumentation firmware
structure.
- Optical POL. controlling device development and manufacture.
- Developed test tasks and test program(Labview, VC executable, or DLL) for
prototype Test/Debug/Validation.
- Built QC procedure and test design for new released product.
Project Accomplishments
o POS-002 Polarization Tracker Project (August. 2008) .
o PSM-001 Polarization Scrambler Project (April. 2009)
o Motorized Variable Time Delay Line Project (October. 2009)
o PMDPro Polarization Optimized PMD Source Project (October. 2009)
o PMDC-OEM Project (Jun. 2010)
o MDL-OEM Motorized Variable Optical Delay Line Project (Feb. 2012)
o ODG Programmable Optical Delay Generator Project (May. 2012)
o 2U Second Generation Universal System for General Products Upgrading
Project (Sept. 2011 ~ until now)
Design Engineer (Jan. 2008 - Dec. 2008)
Company: I/O Controls Corp., California, USA
- Concept for new product research and development.
- Experience with I/O control, RF module, integrated PCB multi-layer
circuit Design.
- Designed Zigbee RF transceiver/receiver integrated module that includes
LIN, CAN (J-1939), UART Code (RS-485, RS-232) interface ability.
- Developed MCU/CPLD system supporting UART, CAN, and LIN Protocol.
- Experience with firmware for IEEE 802.15.4 compliant transceiver
supporting ZigBeeTM, UART, and LIN Protocol.
- Experience with wireless communication DSSS (direct-sequence spread
spectrum) system.
- Developing noise waive device.
- Test program, GUI, Control logic PLC design and development.
- QC design for testing and verifying.
- Information collection & data research.
Project Accomplishments
o DINEX Link Wireless Control system Project (Jan. 2008)
o DCPL Communication system Project (March. 2008)
o LED lighting Driver system Project (May. 2008)
Electronic Engineer (May 2004 - June 2005)
Company: VIA Networking Technologies, Inc, Taipei, Taiwan
- Designed PoDC and APM of electronic circuit
- Designed a demo/testing board for company's new generational wireless
chips
- Measured and established a reference for the output of new chip
- Provided Logic team bare chip probing for I/O adjustment
- Solved customer companies' problems that FAE team cannot deal in their
on-site service
- Utilized the developed board to test and analysis the new chips using
equipment such as Hp4284, 53131,TDS754, 784 and so on
Project Accomplishments
VT6655/6656 wireless chip demo/testing board Project (Feb. 2005)
Internship
Field Application Engineer (July 2007 - Sept. 2007)
Company: CyberTAN Technologies, Inc, California, USA
Research Assistant (Jun 2006 - Sept. 2006)
University of California, NDL Laboratory, Riverside, California
Part Time
Research Assistant (Jun 2001 - Sept. 2001)
TamKang University, Intelligent System Laboratory, Taiwan
Assistant Engineer (July 1999 -Sept. 2001)
The Third Wave (FunTown) Information CO. LTD., Taipei, Taiwan
ELECTRICAL ENGINEERING-REALTED ACTIVITIES
FENA 2007 3rd Annual Review
- Poster: Q. Shao, M.Shamsa, Y.A. Tan and A.A. Balandin, "Modeling-based
Optimization of Semiconductor
Nanostructures with Negative Differential Resistance" FENA 3rd
Annual Review, Jan, 2007, Los Angeles, CA
CNID PI 2006 Annual Review
- Poster: W.L. Liu, Y.A. Tan, D. Nika, E.P. Pokatilov and A.A. Balandin
"Phonon Engineering and Heat Transport in GaN Hetero-and
Nanostructure." DARPA-DMEA CNID PI Review, June 26, 2006, Santa
Monica, CA.
Awards:
- 2001 Taiwan National Soccer Robot Competition: 1 to 1 Competition,
Runner-up.
Contact this candidate