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Bengaluru, KA, India
... Developed 8b/10b Encoder in Transmitter side. Developed 10b/8b Decoder in Receiver side. Project 2 : Verified USB 3.0 SUPER SPEED PHY LAYER Tool used : Questa Sim 10.0b Language : System Verilog Description : Developed test bench components using ...
- 2015 Dec 11
Bengaluru, KA, India
... The components used are AT89s51, Pair of Encoder and Decoder,RF module . STEPS INVOLVED: Project Conceptualization. Circuit Designing. Testing of Circuit Design. Product Protocol OTHER DETAILS Languages known: English, Kannada, Hindi Hobbies ...
- 2015 Sep 06
Bengaluru, KA, India
... I have used Raspberry pi in order to control the UGV and the main control is given to it in such a way that it acts like Encoder and atmega328 act like the decoder in which the motor drivers are attached. The motion of the UGV and Movement of the ...
- 2015 Aug 22
Bengaluru, KA, India
... In this, incremental type rotary encoder and LVDT sensor’s interfacing is done with PLC which gives simultaneous output of actual lift of cam on the camshaft and cam lobe angle from the given reference position.” ACHIVEMENTS 1st prize winner in PRO ...
- 2015 Jun 18
Bengaluru, KA, India
... The controller inputs the hand position to encoder which encodes & transmits the data through RFID. The RF receiver receives the data transmitted and decodes the data. The decoded direction is processed by controller and displayed in LCD terminal. ...
- 2015 Jun 09
Bengaluru, KA, India
... Academic Project: 1) TITLE : “Verification of USB3.0 Transmitter( physical layer)” TEAM SIZE :3 LANGUAGE : System verilog DESCREPTION: USB 3.0 transmitter consists of scrambler, 8b/10 encoder and PISO shift register. Scrambler is used to reduce ...
- 2015 May 31
Bengaluru, KA, India
... The stabilization loop is then nested within a position (outer) loop that uses encoder position feedback. The role of the stabilization loop is to attenuate jitter and stabilize the line of sight (LOS) against disturbances, while the main role of ...
- 2015 Apr 26
Bengaluru, KA, India
... PCS(Ethernet) -RTL design: HVL: Verilog EDA Tool: Questasim Description: Designed the Physical Coding Sublayer that comprises of Transmitter(Encoder),Receiver(Decoder,Synchronizer),Auto Negotiation block. Responsibilities: Architected the design ...
- 2015 Feb 24
Bengaluru, KA, India
... state changes between disabled, blocking, listening, learning and forwarding states Title: Design, Development of JPEG Encoder, Decoder And Maintenance of Audio & Video Sync For Third Generation Multimedia files: Period: Sep' 06 - Aug '07 Client: ...
- 2015 Feb 04
Bengaluru, KA, India
... Integration between hardware and software is done using Shared memory architecture TOOLS : Xilinx ISE & EDK LANGUAGE : VHDL, embedded C PLATFORM : Linux (Cent OS) Hardware based Image Viewer and Encoder - ASIC Design Advanced Course Project in Lund ...
- 2015 Jan 18