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Verilog resumes in Portland, OR

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Engineer Software

Hillsboro, OR, 97124
... - Using System Verilog, verilog and VHDL RTL languages - Detailed knowledge of System Verilog, verilog -2001, verilog and VHDL - Scripting including Perl, Awk and Sed - Debugging embedded hardware and software - C++ testbenches to drive emulation ... - 2010 Sep 10

Electrical Engineer Design

Sherwood, OR, 97140
... EKV2.6, BSIM3) using Matlab and Verilog-a Modeling language in Qucs (Open- Source) EDA simulation tool. Professional Experience: Mentor Graphics (6 Month Internship) : Software Engineer 2004 Improved test speed and quality of Circuit Verification ... - 2010 Aug 26

Engineer Quality Assurance

Portland, OR, 97203
... * Traffic Light Controller: Designed a traffic light controller that accommodated a four-way intersection using a state machine and behavioral modeling in both Verilog and VHDL. * Binary Integer Sorter: Designed a binary integer sorter using ... - 2010 Aug 13

Project Electrical

Portland, OR, 97201
... SKILLS : Programming: Fluent in Verilog, C and Matlab. Other: Hands on experience in working with FPGAs MAJOR PROJECTS: Microprocessor based control system - Embedded systems Project The project involved developing hardware using Verilog and ... - 2010 Aug 03

Software Engineer

Portland, OR, 97212
... EDUCATION: Bachelor of Science in Electronics Engineering Technology (June 2001) DeVry Institute of Technology Phoenix, AZ (Calgary Campus) Graduated with honors (GPA: 3.92) TRAINING: Labview Workshop - National Instruments Advanced Verilog design ... - 2010 Mar 24

Design Engineer

Hillsboro, OR, 97124
... MATLAB, Awaves, Hugin, DVE, C, C++, Visual Basic, PERL, MS SQL, Cadence Virtuoso Xilinx ISE 6, ALTERA MaxplusII, VHDL, Verilog, Mentor Graphics Veloce and Vstation VPRO RELATED WORK EXPERIENCE Emulation Intern Aug ‘08 – May ‘09 Intel Corporation, ... - 2010 Mar 09

Software Signal Processing

Beaverton, OR, 97006
... Preserved advantages of verifiability (with tool support) of synchronous reactive systems and also provided formal semantic model for reactive/real -time features of VHDL/VERILOG. Discussed practical case study for FPGA program. Guided student ... - 2010 Mar 09

090104 Shaun Maki Resume

Portland, OR, 97229
... ASM, C, and C++ Programming MS Project, dashboards, SharePoint Oracle, Sybase, and CRM tools Version Control & Licensing SAP, MS-Access, DB2, and dBASE Windows, Vista, Linux, & Apple Real-time Software, OSs, & PLCs Verilog/VHDL/C design and debug ... - 2009 Jan 09
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