Software Signal Processing

NAGARAJA SRINIVASA Ph.D

****, ** ********** ** *****: abnv31@r.postjobfree.com

Beaverton, OR, 97006 U.S.A Residence: 503-***-****

SUMMARY

Research Scientist turned market savvy and customer focused Technology Management professional: 15+ years

experience in leading Signal Processing and Multimedia Communication systems and software for Telecom, Medical,

Consumer and Security products. Adept in building and leading top performing Center of Excellence teams in

delivering many Industry s first Technology solutions exceeding expectations of international customers on both large

complex programs and multiple diverse projects utilizing SEI CMM Level 5/ ISO practices. R&D expertise includes:

Technology /Product Planning, Architect and end-to-end Systems Engineering of complex systems

Leading system solution and Applications/IP development in startups and globally dispersed matrix organization

Managing full life cycle development of real time embedded systems, PC software and Test Tools

Engineering Management, Program Management, Project Management, Sub-contract Management

•Standards •University Relations: Leveraging R&D Expertise

Research

• Worldwide Customer/Account Management

Business, Organizational and Resource Development

PROFESSIONAL EXPERIENCE

Director of Applications Development, MATHSTAR INC. Hillsboro, OR 2007 - 2008

Responsible for multiple multi-chip system solution with IPs for Medical and Video Products

Managed FPOA Application Engineers team: budget, staffing, task assignment, proj ect planning, mentoring,

participate in review of Architecture, Design, Test plans and ensuring quality and timely customer deliverables.

Sub-contract management of IP component on FPGA, PC software and additional resources.

Assisted Marketing in customer engagement for complete system solutions to generate higher revenue.

Facilitated FAE and Sale teams in supporting customers. Helped Technical writer in creating User Manuals.

Managed feature enhancement for MPEG2 Video Encoder system with revenue opportunity of over $5M

Led FFT implementation on FPOA- secured a design win of $600K from a major medical imaging company

Technical Lead and Program Manager for PCIe based JPEG2K Encoder card; Re-started IP efforts and drove

development of full solution. Assisted marketing in customer engagement and proposal for revenue of $2.2M

Program oversight for sub-contracted H.264 Video encoder: Feature Set, Architecture and feasibility studies

Mentored two engineers to prototype FPOA IP development tools for increased engineering efficiency

MOTOROLA INC. 1992 - 2007

Distinguished Member of Technical Staff (R&D), iDEN Mobile Devices, Plantation, FL, USA (2001 – 2007)

Performed advanced technology planning, product development, system engineering and led CMM Level 5 initiatives.

Platform Development for Industry s First System on a Chip (SOC) solution for Direct Talk 05 – 07

Primary customer contact - Planned and managed all customer deliverables including APIs for IC interface, reference

host software for hardware platform enabling rapid product evolution for single/multi mode handsets .

Jointly led software team of 15 Engineers in multiple locations while managing nine member team in Beijing, China.

Coached team to capture requirements and architecture details, reviewed design and co-developed test plans.

Chief Architect for APIs for all SOC-Host/PC custom multi-layered communication protocol for Boot, USER and

TEST modes. Owned IC–Host/PC Hardware-Software Proprietary Interface Document.

Provided leadership in Engineering and improved Productivity: Conceived and directed China team in developing

GUI based PC tools on Windows, and in deriving re-useable C/C++ modules for Host Software development.

PcAPP: performed Host function for both USER and TEST modes, yielding a reference implementation.

Architected Test automation for SOC including Boot, air interface protocol, peripheral programming, RF,

FCC and Factory Tuning while maintaining backward compatibility with legacy Radios (AT commands).

Automated Regression Testing reduced platform/product development cycle time

Sniffer captured IC and Host/PC communication – Protocol Analyzer with four layered display

Resulted in demonstrating a voice call within 50 days from first ROM version of IC.

Recognized need for Hardware Abstraction Layer for ensuring proper Peripheral Access across bridge from DSP.

Finalized macros by directing team for RTL testing with IC supplier, and further ensured zero issues.

Re-architected Audio and Tone sub-system from legacy Subscriber platform for improved customer satisfaction.

Contributed Ideas during Innovation sessions and received monetary awards. Patent Committee Member

Received Bravo Awards 2005 and 2006; Recognized with “iDEN Software VP for a Day Award” 2006.

NAGARAJA SRINIVASA Ph.D Page Two

SEI L4/L5 initiative: Knowledge Management- created third party Software Eco-system for iDEN Subscriber: 2004

Synthesized Software Architecture aspects of DSP sub-system of legacy Handset. Rolled out Training classes.

Critically needed for inter / intra group communication of over 200 engineers in Australia, China, India and US teams

for maintaining and porting legacy software increasing efficiency and Cycle Time Reduction (CTR).

System Engineering: Technical Lead investigated feasibility of new iDEN features: End-to-End Secure Dispatch

(PTT) and Interconnect interoperable with General Dynamics (GD) GSM based FNBDT compliant terminals, 2003.

Identified Non-Transparent CD only was supported. Led modifications needed for Transparent mode in

consultation with Infrastructure team resulting in realistic estimates for project cost and feature deployment time.

Supported GD on adding Secure Dispatch feature to legacy Subscriber platform resulting in a new feature roll out.

Managed off shore contract of G.729D Audio codec with GSG India meeting GD s interface specs saving $100K.

Standards: Sole iDEN Rep in 3GPP2 CDMA Rel. C (EVDV) Standards. Active participation needed for next

generation Technology and Product planning to maintain Industry leadership of Push to Talk (PTT) supremacy.

MOTOROLA INDIA ELECTRONICS LTD (MIEL), Global Software Group (GSG) Bangalore, INDIA 1992 – 2001

Senior System Engineer reported to Managing Director: Technology Planning, Business, Organizational, and

Resource Development. Initiated and fostered University Relations leveraging benefits to Motorola. (1997 – 2001)

Technology Planning: Identified new areas to develop expertise and secured business for near and long term growth.

Seven months ex-pat at Research Labs, USA: Performed architecture studies which led to identification of

enabling software technologies needed for evolution of multi-mode Software Radio. Presented at CTO s Meeting.

Led GSG s first Five Year Technology Roadmap preparation: Digital Signal Processing Applications, Multimedia

Communications and Software Engineering Technology presented at CEO s annual review.

Leveraged UK Research Lab work, set up joint team to develop Protocol Testing Tool used extensively for testing

GSM and CDMA protocols yielding increased productivity and CTR. Led to starting Subscriber Testing Group.

Provided inputs to processor architecture design, instruction set improvements and microcodes” needed for

optimizing certain target applications for VeCOMP, MPC8xx, DSP563xx in Austin, Tx and Starcore in Israel.

Ensured Standard participation in JPEG2000 and Digital Audio Broadcast jointly with SPS Geneva 1999-2000.

Chaired Patent and IPR committee: Reviewed Patent Applications and assisted engineers in patent filing.

Business Development

Devised long term MOU with iDEN Division, FL for Software Services generating revenue of over $1M/year.

Invited for SPS annual Planning in Phuket, Thailand, Austin, TX, Tel Aviv, Israel and Glasgow, Scotland.

Secured design wins for Motorola processors jointly with SPS Global Marketing increasing IC market share.

Ensured Quality Software delivered to end customers generating revenue. Selected list includes:

MPC8xx at Kodak, USA with JPEG still image compression for Digital cameras.

DSP568xx at Nortel, Canada with V.22 soft Modem, with a software channel simulator for Vista Product

MPC8xx at Alcatel, Europe with V.34 soft Modem and Hand s Free Speaker Phone for DTAD

MPC8xx and DSP563xx at CDOT, India for various cellular infrastructure products.

Organizational Development

First member of Technical Ladder. Influenced setting up Asia Pacific Tech Ladder process. Counseled, evaluated

and inducted senior Engineers who opted for non-managerial career path.

Recruited and Coached Technical and Project Managers. Provided Succession planning which minimized

customer impact due to attrition.

Coached middle level Managers as part of Leadership Acceleration Program (LeAP) in India.

Arranged Lectures /Training from Experts in Industry and Universities for technical enrichment of Engineers.

Resource Development: Staffing needed to meet Customer Deadlines. Increased profit margin by more than 25%.

Team Member which Recruited and planned training of 25 non-Engineering Graduates for Application Software.

Team Member which evaluated 3rd party Companies for hiring contractors. Reduced Management overhead.

University Relations: Worked with legal in drafting MOUs with various Universities for different programs.

Setting up Motorola labs in IISc, IIT Delhi and REC Trichy; DSP and PowerPC Curriculum Development.

Managed three multi-years research projects and two product prototype development (Refer Addendum for details)

Nominated for Fellow of Indian National Academy of Engineering, Delhi 2002 for fostering University relations

NAGARAJA SRINIVASA Ph.D Page Three

Manager, Digital Signal Processing (DSP) Algorithms and Applications Centre, (45 Engrs., 2 PMs) 1995 - 1997

Started the DSP team from ground zero utilizing SEI CMM Level 5 practices with emphasis on Quality, Reuse, CTR,

and User Documentation meeting/exceeding customer expectations. Secured Projects from multiple global customers

and ensured timely delivery. Developed Technology Road Map and managed operations: Recruited, planned training,

Job Assignment, Performance Appraisal, Career and Succession Plans for project managers and engineers.

Accredited as Center of Excellence from peers within Motorola and customers globally. Generated revenue over

$5 M which led to 3X growth. Inducted as Associate Member to CTO s Science Advisory Board in 1996.

Invited to SPS (now Freescale Inc.,) President s world wide strategy and long term planning at USA and Europe.

Product Planning for GSM subscriber chipset and software for Merchant Market jointly with team in France.

Initiated Cellular Subscriber Protocol software development and growth opportunities to Engineers.

Program Oversight of teams in Bangalore and Australia for GSM Base band and Protocol software.

Co-led Complier and tools development leveraging Code Generator Generator expertise from IISc needed

for architectural evaluation for IC design team at Tolouse, France.

Program Management of Multiple projects for different customers globally:

Speech Codecs: VSELP (IS54), True Speech, G.722, G.728, G.726, OKI and MVI ADPCM on DSPs.

GSM: FR, HR and EFR speech codecs and Channel Codecs on DSP563xx and MATLAB: for handsets at

Toulouse, France and Libertyville, USA and multi-channel versions for Infrastructure Products, U.K.

GSM Transcoder System Software developed jointly with UK team-system integration and field testing.

Security Algorithms: Application Notes for RSA, IDEA and DES implementation on DSP561xx.

Modem Data Pump: V.8bis, V.22bis, V.32, V.32bis, V.34; V.42 and V.42bis for various SPS customers.

Video Codecs: H.261and H.263 implementation in C on PC and DSP563xx.

Audio Conferencing: Simultaneous Voice and Data on DSP563xx based PC Media Card and SPOX.

Library Functions: IC (polynomial evaluator) designed at Corporate Research Labs, Schaumburg, USA.

Planned Application Software for Star Core Kick-off Meeting in Tel Aviv, Israel, 1997.

Facilitated set up of DSP Group of 10 Engineers in Singapore duplicating Bangalore achievement.

Led jointly with Tools Team and IISc Faculty- developed semi-automatic Assembly code converter from 563xx to

568xx which resulted in more than 50% Cycle Time Reduction and increased productivity.

Led DSP software product exhibits, demos and technical literature at NASSCOM, Mumbai and SPCOM, IISc.

Lead Engineer, Project Manager, DSP (Team Size: 25 Engineers) (1994 – 1995)

Managed development of Application Notes for DSP561xx family: Multi-rate filter modules, JBIG, JPEG, G.165,

Demonstrated MPEG I layer 2 audio codec: Industry s first audio implementation on 16 bit DSP.

Generated revenue over $625K. Complimented SPS (now Freescale) with needed Application software at 1/3 cost.

Inspired and supervised team publish 10 papers in ICSPAT 94, Dallas, TX which provided much needed publicity

for establishing Motorola 16 bit DSP architecture in Industry. Received GM s Appreciation from Austin, TX.

Led conversion of 24 to 16 bits fixed point C implementation of speech codec, channel codec and noise canceller

for Japanese Digital Cellular, IL. Proved that 24 bit AT&T DSP can be replaced by Motorola 16 bit DSP.

Inducted MATLAB for Test automation of DSP assembly software module. Led to CTR by more than 25%.

Received Certificate of Recognition for best practices in key process area of Peer Reviews.

Senior Software Engineer (Team Size: Eight Engineers) (1993 – 1994)

Started DSP Algorithms and Applications Center: Recruited and mentored Graduates. Developed Induction Training

plan. Captured customer requirements and planned projects. Reviewed Design, Test plans and Documentation.

Ensured timely delivery exceeding Customer expectations which led to 3x growth. Generated revenue over $250K.

Team Member making project proposals and meeting Customers - eventually secured Large Scale Projects from

SPS Sector, TX and Iridium Satellite Communications, Phoenix, AZ which led to Center s growth by over 10X.

Established Optimized SEI CMM Level 5 DSP Software Development Process with emphasis on Quality, Reuse,

CTR and Software Documentation.

Managed development of Application Notes for Industry s first 16 bit DSP 566xx with benchmarks (Dr. BUB)

Libraries: Arithmetic, Matrix, Floating point

Filters: FIR, IIR, Adaptive- LMS for different structures. Sampling Rate conversion

Transforms: 1-D & 2-D Discrete Cosine Transforms (DCT), Fast Fourier Transform (FFT).

Speech Codecs: G.711, G.721 standard and non-standard; AR parameter estimation.

Tones: CAS, SAS, DTMF: Generation and Detection meeting MIETEL Tests

Modules: Huffman encoding and decoding, CRC, Caller ID, Convolutional coding and Viterbi Decoding.

NAGARAJA SRINIVASA Ph.D Page Four

Software Engineer: Initial batch of Engineers hired in Motorola s first Software Center, Bangalore. (1992 - 1993)

Met Customers to scope out Project Requirements, developed Project Plans with team inputs and led Development.

Led Requirements and Design team in SEI CMM Assessment: MIEL achieved Industry s first SEI CMM Level 5,

and CEO s Quality Award. Interviewed for New York Times front page article on 29th Dec.1993.

Guided Team in publishing four papers and co-authored one at Software Engineering Symposium, IL, USA.

Interviewed Engineering candidates needed for Growth of Center.

Led Non-standard G.721 speech codec implementation on DSP56002: Authored Design Document and guided

two Engineers in Coding, Testing and Documentation. Met Customer Satisfaction resulting in 3x growth.

Gathered requirements at Schaumburg, IL and led analysis for Digital Interface Unit and Zone Control Emulator.

1988 – 1991

Post Doctoral Research Associate

School of Electrical Engineering, Purdue University, West Lafayette, IN, USA & Indian Institute of Science, INDIA.

Guided Graduate Students in Research work and publishing papers. Teaching Assistant. Reviewed Technical Papers.

New Algorithms for Robust Estimation of Direction of Arrival of wideband signal and 2-D Sinusoids in the

presence of non-Gaussian Noise with applications to Radar and Sonar: [Funded by Office of Naval Research].

Developed Pattern Classifier for classifying Brain Stem Responses.

EDUCATION

Ph.D Electrical Engineering, Indian Institute of Science (IISc), Bangalore, INDIA

Thesis : Applications of Linear Prediction Modeling and Filtering in the Radon Space

(Algorithms for: Image Reconstruction from Incomplete and Noisy Projection Data: (Medical Imaging / CT)

Detection of Edges directly from projections

2-D high resolution Spectral Estimation and duality with Maximum Entropy)

o Software utilized in development of Nuclear Testing Equipment for Atomic Research Centre, INDIA

B.E. Electronics and Communication, First Class with Distinction, University of Mysore, INDIA

Project: Design and Implementation of Digital Filters on Intel 8085 using floating point assembly routines

PROFESSIONAL DEVELOPMENT

Image and Video Coding: K.R. Rao Advanced Digital Communications I and II by Bernard Sklar

Digital Filters by S. K. Mitra and P. P. Vaidyanathan Array Signal Processing Workshop by T. Kailath, et.al.,

Overview courses: WiMAX, EVDO, EVDV, VOIP, 802.11 : WLANs and Cellular Interworking, WCDMA, CDMA2000,

IS-95, iDEN, EDGE, GSM, Seamless Mobility, H.264, MPEG2, JPEG2K, TCP/IP, IPv6

Dale Carnegie’s 8 Weeks Tailored course: Leading at Motorola Digital Six Sigma at Motorola

Stephen R Covey’s 7 Habits of Highly Effective People Influence by Forum

Workshops: Patent and IPR; Technology Planning; Finance for Non-Finance Managers; Performance Appraisal, Coaching:

Leadership Accelerated Program for Middle Managers, Interviewing Skills, Annual MIEL Management workshops (94 - 98)

SEI s Software Architecture: Principles and Practices; CMMI; SEI CMM based Developing Quality Software (3 months)

PUBLICATIONS / HONORS / RECOGNITION

1 Book Chapter, 3 IEEE Journal Papers -2 Invited for Special issue, 17 Conf.; 2 Technical Reports

Received Bravo Awards 2005 and 2006; Recognized with “iDEN Software VP for a Day Award” 2006.

Nominated for Fellow of Indian National Academy of Engineering, Delhi, India. 2002

Certificate of Recognition for contributing to Technical paper Reviews and Internal Tools Fair Referee for

Motorola Software Engineering Symposium, USA, 1999-2003

Invited Member for UNESCO Regional University-Industry Partnership Program, IIT-Delhi, India, 1998

Elected as Motorola Science Advisory Board Associate in recognition of “creative and innovative technical

contributions, in particular for contributions to Digital Signal Processing Software and Systems Solutions” 1996.

Reviewer for ICSPAT (1994-95) and for IEEE Transactions on Signal Processing and Medical Imaging 91-93

Marquis Who sWho in America, 1999

Received Student Travel grant from IEEE Information Society and DST, India for IEEE s ISIT 1988, Kobe, Japan

Professional Membership: Senior Member, IEEE, 1992 – Present

Profile: http://www.linkedin.com/in/nagarajasrinivasa

NAGARAJA SRINIVASA Ph.D

UNIVERSITY RELATIONS PROGRAM : Brand Building for Motorola in India and Leveraging R&D Expertise

Identified faculties in various Universities. Worked with Legal department and developed MOU s for retaining IPR.

Nominated for Fellow of Indian National Academy of Engineering, Delhi, 2002.

I. Sponsored Research Projects:

Identified faculties in premier Research Institutes in India. Jointly formulated research project proposals and secured

funding from Corporate. Steering the project to Motorola s benefit by periodic Reviews and inputs from other groups.

1. Asynchronous Framework for Hardware/Software Co-design

Investigator: Professor R K Shyamasundar, Fellow IEEE, Funding: SABA-UPR $20K / year

University: Tata Institute of Fundamental Research (TIFR), Mumbai, 2000-2004

Summary: Developed new paradigm called Multiclock Esterel providing unified framework for design of

synchronous and asynchronous reactive distributed embedded systems. Led to modular specification of

asynchronous systems with multiple clocks. Preserved advantages of verifiability (with tool support) of

synchronous reactive systems and also provided formal semantic model for reactive/real -time features of

VHDL/VERILOG.

Discussed practical case study for FPGA program. Guided student Kalyanasundaram invited presentation in

CTO s UPR session in Dallas,TX, 2002. Arranged for Professor s meeting in Geneva and Munich to discuss

with Embedded System Design group. Facilitated in archiving video recording of his lecture as part of

Technology Seminar Series.

2. Electronic Product Flow Management : A Hierarchical Concurrent Flow Graph (HCFG) Approach

Investigator: Prof. C.P. Ravikumar, Funding: SABA-UPR $20K / year

University: Indian Institute of Technology (IIT) Delhi,1999-2001

Summary: Analytical HCFG approach developed supports design process features such as hierarchy, concurrency

and stochastic nature of task completion times. Provided efficient computation methodol ogy for probability

distribution function of process completion time and for deriving useful statistics: expected completion time, lower

and upper bounds and chances of completion of design process within certain duration. Efficiency and versatility

of new approach was demonstrated by applying it to several design flows for different methodologies /

applications: (1) ASIC design, (2) Petrinet based representation, (3) MCM based systems with manufacturability

considerations, (4) hardware-software co-design flow for single chip implementation of wireless mobile

transceiver, and (5) software design flow for application specific instruction set processor/DSP.

Suggested couple of design flows for investigation. Communicated research work and software tools

developed to IC Design teams in Austin, TX and GSG Software Centre in Australia. An interview with Prof.

Ravikumar appeared in EEdesign, March 2002.

3. ADVANCED COMPILER TECHNOLOGIES: Code Generator Generator (CGG)

Investigator : Prof. Y N Srikant, Funding: MIEL Bangalore, $2.5 k

University: Indian Institute of Science (IISc), Bangalore 1997-98.

Summary: Collaborative research and advanced development project on re-targetable tools was conceived leveraging

research work done at IISc on CGG. An Architecture Specification Language (ASL) was utilized for architecture

inputs and CGG was utilized to automate development of required tools. Fast method of developing complete tool

chain of Complier, Linker, Debugger for Processor evaluation was demonstrated. Software Engineers worked together

with faculty in development of technology which was successfully used while evaluating new chip architectures for

Wireless Communication in Design Centre in Tolouse, France. Generated revenue of over $250K.

II. Initiated Setting up Motorola Laboratories in Universities securing funding from Corporate and SPS:

Planned and managed budget of $150K. Laboratories set up:

1. Motorola Digital DNA Systems Laboratory at Center for Electronics Design and Technology (CEDT), IISc.

Inaugurated by CTO team.

2. Motorola DSP Laboratory, Regional Engineering College, Trichy.

3. Motorola Microcontroller Laboratory at IISc, Bangalore and Indian Institute of Technology, Delhi.

NAGARAJA SRINIVASA Ph.D URP Page 2

4. Curriculum Development- familiarizing students with Motorola Technologies for trained man power

Conceived, Planned and Assisted Universities covering over 100 colleges and over 11K students in introducing

theory/ lab courses incorporating DSP563xx, HC11 and MPC860: Secured $500K funding from President,

SPS, TX leading to his first visit to India.

Planned workshops for teachers creating awareness of new technologies and its application areas.

Organized week long training program for over 150 teachers. Assisted them with course and lab design.

Reached DSPs Lab Kits to over 80 Engineering Colleges of Visveswariah Technological University in

Karnataka State benefiting more than 10,000 students / year.

Facilitated introducing Microcontroller laboratory course at IIT Delhi benefiting over 100 students / year.

Managed Course Development on MPC8xx through CEDT, IISc and workshop for training teachers from

20 premier Regional Engineering colleges benefiting over 1000 students / year.

IV. Secured Corporate Funding and Reached DSP Development Kits - Five IITs and over 20 Colleges in India.

V. Initiated Motorola Scholarship program in IISc and IITs at Bombay, Delhi and Kanpur.

V. PRODUCT PROTOTYPE DEVELOPMENT - Industrial Consultancy Projects:

2000 – 2001

1. Department: CEDT, IISc Funding: $2.5 K / project

Complimented Software Center with Product development expertise to develop products for Asia Pacific Markets at

very low cost. In collaboration with engineers, faculty and students two product prototypes were conceived, developed

reusing software components and demonstrated within 10 months:

1. Low cost Internet Protocol switch using MPC860

2. Three phase energy meter using DSP56800 with interface to RF communication module

Jointly with Business Development Manager, significant efforts were made exploring large scale manufacturing of

these products in Indian Industries: BPL, and L&T. Explored to sell them through Cable Operators in Mumbai and

Public Utility Companies in various States to end customers.

2. Fixed Point conversion of MPEG 3 Speech decoder; Department: EE Funding: $2.5 K 2001

Converted floating point standard specification of MPEG 3 to fixed point with emphasis on optimization for mips and

memory. Resulting work utilized for Software Development of codec on various processors.

ADDITIONAL PROFESSIONAL ACTIVITIES

Project guidance to “One Pass to Production” with Florida Atlantic University (FAU), Florida 2004 - 06

External Examiner for Graduate Student Thesis at RECs: Trichy, Surathkal, and SJCE Mysore, India 1996-2001

Judge for Evaluating Student Papers during IEEE Conference in Bangalore, Dec 2000

Judge for evaluating Motorola SPS (now Freescale) India IC Application context, 1999-2000.

Advisory Committee Member and Examiner for Scientific Faculty, Indian Institute of Science, Bangalore 99-2000

Invited lecture on Technology trends at CEDTI's Directors Strategy Meeting, Bangalore, Nov. 1999

Invited Panel Member for discussion with Chinese Ministry delegates visit to National Aerospace La boratories,

Bangalore India on Industry and Research Institutes interaction with Universities, 1999

Invited Member for UNESCO Regional University-Industry Partnership Program, IIT-Delhi, India, 1998

Technical Reviewer for SPCOM and Committee member for Industry Exhibits, IISc, Bangalore, India 96-99.

Supervised B.E., M.E. Projects and Student Interns 94-98

Career Counseling for Technical and High School Students 1997

Guided Graduate and Doctoral Students in Research Work at IISc, Bangalore and Purdue University, USA. 85-91

Reviewer for ICSPAT (1994-95) and for IEEE Transactions on Signal Processing and Medical Imaging 91-93

Reviewer and Program committee member for many national conferences and seminars 1985 – Present

Professional Membership: Senior Member, IEEE, 1992-Present

COMMUNITY SERVICES

Initiated and led social projects activities in MIEL, Bangalore, INDIA 1997 -1999

Volunteer services for American Red Cross, South Florida, USA 2006-7

NAGARAJA SRINIVASA Ph.D

4175, NW Scottsdale Dr Email: abnv31@r.postjobfree.com

Beaverton, OR, 97006 U.S.A Residence: 503-***-****

PUBLICATIONS

1. N. Srinivasa, “Architectural Studies on Software Radio”, Internal Report, Communications Systems and

Technology, Motorola Labs, Schaumburg, USA, 2000.

2. K. Rajgopal, N. Srinivasa, K.R. Ramakrishnan, "Image Reconstruction from Incomplete Projections: A Linear

Prediction Approach", INVITED CONTRIBUTION in Medical Imaging Techniques and Applications

Modalities, Ed. Cornelius T. Leondes, pp. 281-328, Vol. 5, Gordon and Breach International Series in Engg.

Technology and Applied Science, CA 1997. Also in Special Issue on Journal of Medical and Life Sciences,

Bio-Medical Society of India, 1998.

3. A. Hiregange, R. Subramaniyan, N. K. Sancheti, N. Srinivasa, "Speech Coders: G.711 and G.721

Implementation on the Motorola DSP56100 Family," in Proc. Intl. Conf. on Signal Processing Applications

and Technology (ICSPAT 95), 1995.

4. A. Hiregange, R. Subramaniyan, N. Srinivasa, "1-D FFT and 2-D DCT Routines for the Motorola DSP56100

Family," ibid..

5. R. Subramaniyan, A. Hiregange, Kalyan Krishnan, N. Srinivasa, "DTMF Generation and Detection on the

Motorola DSP56100 Family," ibid.

6. T.R. Madhusudan Sastry, T. Ganesan, B. Madhukar, N. Srinivasa, "Implementation of International Data

Encryption Algorithm (IDEA) on the Motorola DSP56100 Family," ibid.

7. Rajib Mall, N. Srinivasa, S. Inamdar, "Experience from Globally Distributed Software Development",

Motorola Software Engineering Symposium, Schaumburg, USA, 1993.

8. R. L. Kashyap, D. D. Lee, N. Srinivasa, "Robust Techniques for Bearing Estimation in Contaminated Gaussian

Noise," Technical Report TR-EE-89-67, School of Elec. Engg., Purdue University, West Lafayette, IN 47907

USA, Dec. 1989.

9. N. Srinivasa, D. D. Lee, R. L. Kashyap, "Direction of Arrival Estimation for Narrow and Wide band Signals

using Radon Transform," Proc. Indo-US Workshop on Spectral Analysis in One or Two Dimensions, (New

Delhi, India), November 1989.

10. G.R. Ramesh, N. Srinivasa, K. Rajgopal, "A Radon Transform Approach to Linear Predictive Coding of

Images," in International Conference on Image Processing, '89, (Singapore), 1989.

11. S.G. Oh, N. Srinivasa, R. L. Kashyap, "A New Robust method for 2-D Sinusoidal Frequency Estimation,"

Sixth IEEE ASSP Workshop on Multidimensional Signal Processing, (Monterry, California), Sept. 1989.

12. N. Srinivasa, D. D. Lee, R. L. Kashyap, "Robust 2-D Spectral Estimation using Radon Transform," ibid.

13. G.R. Ramesh, N. Srinivasa, K. Rajgopal, "An Algorithm for Computing the Discrete Radon Transform with

Some Applications," Proc. The 6th Scandinavian Conference on Image Analysis, (Oulu, Finland), June 1989.

14. N. Srinivasa, D. D. Lee, R. L. Kashyap, "Direction of Arrival Estimation using Radon Transform," in Proc.

1989 Conf. On Information sciences and Systems, The John Hopkins University, (Maryland), March 1989.

15. N. Srinivasa, K. R. Ramakrishnan, K. Rajgopal, "On 2-D Maximum Entropy Spectral Estimation," in IEEE

Trans. on Signal Processing, vol. 40-1, pp. 241-244, Jan. 92.

NAGARAJA SRINIVASA Ph.D Publications, Page Two

16. N. Srinivasa, K. R. Ramakrishnan, K. Rajgopal, "On Multi-dimensional Maximum Entropy Spectral

Estimation," in 1988 IEEE Symp. on Information Theory, ISIT '88, (Kobe, Japan), 1988.

17. N. Srinivasa, K. R. Ramakrishnan, K. Rajgopal, "Adaptive Noise Canceling in Computed Tomography," in

National Symposium on Signals, Systems, and Sonars, (Cochin, India), March 1988 and also in IEEE Symp. on

the Engg., of Computer Based Medical Systems, (Minnesota), June 1988.

18. N. Srinivasa, N. S. Amarnath, K. R. Ramakrishnan, K. Rajgopal, "On Detecting Edges from Projection

Data," in Proc. IEEE Region 10 Conf., TENCON-87, (Seoul, Korea), 1987, and in IEEE Trans. on Medical

Imaging, vol. 11-1, pp. 76-80, Mar 1988.

19. N. Srinivasa, K. R. Ramakrishnan, K. Rajgopal, "Image Reconstruction from Arbitrarily Missing/Noisy

Projection Data," in Proc. Intl. Symp. On Signal Processing and its Applications, ISSPA '87, (Brisbane,

Australia), 1987.

20. N. Srinivasa, K. Rajgopal, K.R. Ramakrishnan, "On a Programmable Signal Processor for VLSI," in IEEE Intl.

Conf. on Acoustics, Speech and Signal Processing, Proc. ICASSP '87, (Dallas, Texas), pp. 795-796, Apr. 1987.

21. N. Srinivasa, K.R. Ramakrishnan, K. Rajgopal, "Two Dimensional Spectral Estimation: A Radon Transform

Approach," ibid, pp. 1533-1536, Apr. 1987. Also as an INVITED PAPER in Special Issue on Underwater

Acoustic Signal Processing, IEEE Journal of Oceanic Engineering, Vol. OE-12, no. 1, pp. 90-96, Jan. 1987.

22. N. Srinivasa, P.R. Suresh Kumar, K. Rajgopal, "On Two Dimensional Sampling rate Conversion," in Proc.

Platinum Jubilee Conf. On Systems and Signal Processing, Indian Institute of Science, (Bangalore, India), pp.

374-377, Dec. 1986.

23. N. Srinivasa, K. R. Ramakrishnan, K. Rajgopal, " Image Reconstruction from Hollow Projections: A Linear

Prediction Approach," ibid., pp. 444-447, Dec. 1986.

24. N. Srinivasa, V. Krishnan, K. R. Ramakrishnan, K. Rajgopal, " Image Reconstruction from Limited Angle

Projections: A Linear Prediction Approach," in Proc. VIII IEEE Engineering in Medicine and Biology

Systems EMBS Conf., (Dallas, Texas), pp.1168-1171, Nov. 1986.

25. N. Srinivasa, V. Krishnan, K. R. Ramakrishnan, K. Rajgopal, "Image Reconstruction from Truncated

Projections: A Linear Prediction Approach," in IEEE Intl. Conference on Acoustics, Speech and Signal

Processing, Proc. ICASSP '86, (Tokyo, Japan), pp. 1733-1736, Apr. 1986.

NAGARAJA SRINIVASA Ph. D.

4175, NW Scottsdale Dr Residence: 503-***-****

Beaverton, OR 97006 Email: abnv31@r.postjobfree.com

REFERENCES

DANIEL J SWEENEY

Ex-President and Chief Operating Officer

Mathstar Inc.,

503-***-**** (M)

abnv31@r.postjobfree.com

JACK DAVIS

Vice-President

Northrop Grumman

310-***-**** (O)

abnv31@r.postjobfree.com

TERRENCE M HENG

Ex-Corporate Vice-President,

Global Software Group

Motorola Inc.,

508-***-**** (M)

abnv31@r.postjobfree.com

C. S. RAVISHANKAR Ph. D

Asst. Vice-President

Hughes Network System

301-***-**** (O)

abnv31@r.postjobfree.com

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