| Resume alert | Resumes 1 - 10 of 6300 |
Ic Design Automation
Cedar Park, TX
... •IC design netlist translation, pre-processing, format exchange/flow integration/extraction between LEF/DEF/EDIF/SDF/SPF/CDL/Spice/YAML/Verilog/database/internal netlist/constraint parsing and generation/library mapping. •EDA logic/physical database ... - Apr 27
... •IC design netlist translation, pre-processing, format exchange/flow integration/extraction between LEF/DEF/EDIF/SDF/SPF/CDL/Spice/YAML/Verilog/database/internal netlist/constraint parsing and generation/library mapping. •EDA logic/physical database ... - Apr 27
Machine Learning Software Development
Hyderabad, Telangana, India
... Experience designing/building FPGAs using VHDL, Verilog, or System Verilog. Experience with high-performance networking stacks on FPGAs. Experience with commercial and/or open source large scale data processing, storage frameworks and platforms. ... - Apr 26
... Experience designing/building FPGAs using VHDL, Verilog, or System Verilog. Experience with high-performance networking stacks on FPGAs. Experience with commercial and/or open source large scale data processing, storage frameworks and platforms. ... - Apr 26
Computer Vision Machine Learning
Quan 1, 71000, Vietnam
... WORK EXPERIENCE Apr 2019 - Jul 2019 ADTECHNOLOGY & SNST VIET NAM TRAINEE • I have been trained SoC (System on Chip) Design flow, Logic design and simulation (Verilog). • Synthesis with Synopsys DC (Design Compiler) Workshop. • STA with Synopsys ... - Apr 24
... WORK EXPERIENCE Apr 2019 - Jul 2019 ADTECHNOLOGY & SNST VIET NAM TRAINEE • I have been trained SoC (System on Chip) Design flow, Logic design and simulation (Verilog). • Synthesis with Synopsys DC (Design Compiler) Workshop. • STA with Synopsys ... - Apr 24
Software Engineer Embedded
San Jose, CA
... Familiar with Verilog-HDL, synthesis, timing and logic verification. Much experience of C/C++ based embedded code development for SoC-level verification. Highlight • SoC level module integration and verification. Developed and maintained the test ... - Apr 23
... Familiar with Verilog-HDL, synthesis, timing and logic verification. Much experience of C/C++ based embedded code development for SoC-level verification. Highlight • SoC level module integration and verification. Developed and maintained the test ... - Apr 23
Computer Engineering C++
Murphy, TX, 75094
... College’s Dean’s List from Fall 2018 – 2019 TECHNICAL SKILLS Programming Languages: C, C++, Java, Python, JavaScript, and Verilog Software and Framework: Rest API, SOAP API, Angular, Splunk, Unix/Linux, Eclipse, Visual Studio, IntelliJ, Cadence ... - Apr 23
... College’s Dean’s List from Fall 2018 – 2019 TECHNICAL SKILLS Programming Languages: C, C++, Java, Python, JavaScript, and Verilog Software and Framework: Rest API, SOAP API, Angular, Splunk, Unix/Linux, Eclipse, Visual Studio, IntelliJ, Cadence ... - Apr 23
Information Technology Computer Science
Quan 1, 71000, Vietnam
... CERTIFICATE Computational Thinking for Problem Solving - Coursera Thu Duc, Ho Chi Minh City 037*-***-*** ad47gc@r.postjobfree.com Hàn Phi Trường AI Engineer EDUCATION SKILLS Programming Languages: Verilog, System Verilog, C++, SQL, Python, C#, HTML ... - Apr 23
... CERTIFICATE Computational Thinking for Problem Solving - Coursera Thu Duc, Ho Chi Minh City 037*-***-*** ad47gc@r.postjobfree.com Hàn Phi Trường AI Engineer EDUCATION SKILLS Programming Languages: Verilog, System Verilog, C++, SQL, Python, C#, HTML ... - Apr 23
Design Engineer
Reno, NV
... CAED tools: Tanner EDA L-Edit Pro, T-SPICE Pro, Mathcad, Ansoft Designer, LabView, Sonnet, Electronics Workbench, Icarus Verilog, Alliance VLSI Tools, Altium Designer, Altera Quartus II, Aldec HDL Express, IAR Embedded Workbench, IAR KickStart, ... - Apr 23
... CAED tools: Tanner EDA L-Edit Pro, T-SPICE Pro, Mathcad, Ansoft Designer, LabView, Sonnet, Electronics Workbench, Icarus Verilog, Alliance VLSI Tools, Altium Designer, Altera Quartus II, Aldec HDL Express, IAR Embedded Workbench, IAR KickStart, ... - Apr 23
ASIC Design Engineer Intern
Quan 1, 710000, Vietnam
... • VLSI, Verilog, Digital System. • IoTs, AI-Machine learning. FAVORITE • Reading book, Running. • Sport: Football, Badminton, Volleyball. • RTL design – Code Verilog. RESEARCH GOALS Take advantages of my own experience and knowledge at the ... - Apr 22
... • VLSI, Verilog, Digital System. • IoTs, AI-Machine learning. FAVORITE • Reading book, Running. • Sport: Football, Badminton, Volleyball. • RTL design – Code Verilog. RESEARCH GOALS Take advantages of my own experience and knowledge at the ... - Apr 22
Electrical Engineer Product Development
Taunton, MA
... Design and verification with Verilog/VHDL and System Verilog for FPGAs. EMC and electrical safety design and testing for IEC60601-1 compliance Lead verification and validation of systems. Interface with cross functional stakeholders to coordinate ... - Apr 21
... Design and verification with Verilog/VHDL and System Verilog for FPGAs. EMC and electrical safety design and testing for IEC60601-1 compliance Lead verification and validation of systems. Interface with cross functional stakeholders to coordinate ... - Apr 21
Electrical Engineer Program Coordinator
India
... IT SKILLS Languages: C, C++, Verilog, VHDL Tools: Operating System: (Unix)Linux,Microsoft Office DATE OF BIRTH: 01-April-1978 Signature : Date : - Apr 20
... IT SKILLS Languages: C, C++, Verilog, VHDL Tools: Operating System: (Unix)Linux,Microsoft Office DATE OF BIRTH: 01-April-1978 Signature : Date : - Apr 20