GANESAN DORAISAMI

** ******* *****

Taunton, MA *2780

Cell Phone : 224-***-****

Email: ad458p@r.postjobfree.com

OBJECTIVE

An electrical engineer seeking principal R&D role in product development.

SUMMARY OF SKILLS

Lead system/hardware requirements, design verification/validation and schedules.

Technically managing engineering deliverables

Defense & Medical Device design and development.

PCBA design for motion controls and sensing.

Design and verification with Verilog/VHDL and System Verilog for FPGAs.

EMC and electrical safety design and testing for IEC60601-1 compliance

Lead verification and validation of systems.

Interface with cross functional stakeholders to coordinate project deliverables.

SYSTEM & HARDWARE & FIRMWARE DESIGN SKILLS

Jira, ClearCase and DOORS

8/16/32-bit microcontroller (ARM7, ARM9, PIC, 8051, Cortex M3/M4) selection and design into printed circuit board.

VHDL coding and custom IP in Xilinx Vivado and Intel Quartus

Intel Cyclone series, Arria Series, Lattice MacXO2 & ispMACH 4000V

Xilinx Spartan 7, UltraScale, Kinetix.

Embedded software IDE tools (IAR and Keil)

Self-checking Test bench simulation in VHDL/System Verilog using ModelSim

PSPICE simulation for power and motor driver design

Cadence Allegro/OrCAD & DxDesigner for schematic

Signal integrity/EMC simulation with HyperLynx

Matlab, Simulink, MathCad

Source control and bug tracking tools (GIT, ClearCase, ClearQuest, Subversion)

Test Equipment (Logic Analyzers, Oscilloscope, Spectrum Analyzer, Function Generator)

WORK HISTORY

Senior Principal R&D Engineer Olympus Surgical Apr 2023-Present

Westboro, MA

Tech lead for Class II camera control unit for Endoscopy.

SME for electrical, PCBA and EMC for compliance design.

Coordinate product development with offshore teams.

Create product requirements for Visualization system with endoscopes.

Staff Electrical Development Engineer Johnson & Johnson Apr 2021 – Apr 2023

Raynham, Massachusetts

Support supplier design transfer qualifications of legacy products.

Work with external suppliers on component qualifications.

New Product Integration (NPI) with COGS and process qualifications.

Create self-checking testbenches in system Verilog and VHDL for Intel Cyclone V and Xilinx Artix-7.

FPGA selection, various IP and custom IPs generation and work with board level engineers on pinouts mapping.

Sustaining effort porting legacy designs to modern FPGA platform.

Principal Electrical Engineer Raytheon Technologies Jan 2020 – Apr 2021

Select COTS power supply for power distribution unit used in radar systems.

Design of power distribution unit.

System level integration and wiring of motion controllers.

Evaluate and select wires, fuses, connectors, and circuit breakers based on derating.

Principal FPGA Engineer Johnson & Johnson July 2017 – Jan 2020

Raynham, Massachusetts

Created requirements and DFMEA around electrical and systems of camera control unit and single use cameras.

Developed electronics and cabling for endoscope camera.

Video live streaming capital equipment with Lattice ECP3, Cyclone V and Intel Arria V FPGA of camera control unit.

Embedded NIOS 32bit soft-core microcontroller within FPGA.

Printed circuit board design of high speed LVDS and motor controllers.

EMC/Safety design and testing of medical devices.

Lead in DHF related electrical design controls documentation.

Interface with HF, nurse and surgeons on design usability.

Reviewed and add steps in surgical flow diagram for camera control unit.

Provided prototypes to Human Factor Engineering.

Created camera testing protocols for V&V.

Interface with surgeons on image quality and camera use flow.

Develop hardware verification plan and traceability to requirements.

Principal Electrical Engineer Covidien/Medtronic Jan 2014 – July 2017

Mansfield, Massachusetts

Designed Arm based microcontroller board with motor control for DVT medical device.

DSP algorithm development for control systems.

Supported sustaining engineering.

Staff Electrical Engineer Johnson & Johnson Dec 2010 – Oct 2013

Raynham, Massachusetts

Lattice logic design for interface to 16 bit microcontrollers.

Electrical design for Orthopedic surgery medical device.

Analog PSPICE simulation using Multi-Sim.

Manage multiple outsourced layout and PCB assembly activities.

Design for CE/ETL mark and testing against IEC60601-1 standard.

Pressure sensing and brushless DC motor closed-loop control design.

Design transfer and ECO/ECN generation on electrical changes.

Senior Electrical Engineer II Raytheon Mar 2009 – Dec 2010

Portsmouth, Rhode Island

Xilinx Virtex4 FPGA design and verification in VHDL.

Xilinx Spartan 3A-DSP FPGA design and verification in VHDL.

Microblaze design using EDK for Spartan 3A-DSP FPGA.

FPGA functional and timing verification using SystemC (C/C++).

Hardware integration and continuation engineering support.

Generate design document, trace matrix and test verification plan.

Radar imaging algorithm implementation and cPCI bus interface in FPGA.

Principal Electrical Engineer Baxter Healthcare Jan 2000 – Feb 2009

Round Lake, Illinois

Board level hardware design of interface board for infusion medical pumps.

Designed motor control and user interface with Xilinx Spartan 3A and VHDL.

Conducted timing simulation and verification for programmable devices.

Generated specification, test plan, concept selection and device selection for hardware architecture for medical devices.

Documentation of hardware designs, tests, specifications, requirements and simulation results as required by FDA.

Altera Cyclone FPGA using Altera IDE tools and timing simulation.

Create requirements in DOORS, DFMEA and Fault Tolerant Analysis.

Digital filter implementation in FPGA.

Design Engineer II Quantum Corp May 1996-Dec 2000

Shrewsbury, Massachusetts

Developed NEC V850 micro-controller based SDLT1 optical tape drive electronic servo modules.

Designed and simulated algorithms for IIR/FIR digital filters, positioning error and FFT in MATLAB/Simulink and in C for tape drive servo systems.

Designed and tested motor control logic and sine wave generator in VHDL and Verilog for Altera FPGA and CPLD.

Designed external RS232 serial communication 8051 based board to interface to Motorola PowerPC microprocessor.

Developed calibration and filter optimization firmware code in C and Assembly for tape drive.

Developed embedded functional testers for high volume manufacturing of mixed-signal dual processor circuit board.

Coordinated firmware and hardware integration from design to manufacturing for high volume circuit board test environment.

Developed and tested I2C device firmware for microprocessor based servo system to communicate with another microprocessor.

Developed board and system-on-chip (SoC) level DSP firmware strategies for product and proto-type designs.

Electrical Design Engineer Seagate Tech May 1994-May 1996

Bloomington, Minnesota

Engineering support for manufacturing yield improvement.

Worked on process and design improvement on tighter quality control of recording heads production.

Used SEM to do failure analysis and defects of recording heads.

EDUCATION

M.Sc in Electrical Engineering 2002

Worcester Polytechnic Institute, Massachusetts

B.Sc in Electrical Engineering 1993

Saint Cloud State University, Minnesota

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