Computer Engineering C++
Resume:
Pujan Kabariya
Murphy, TX
***********@*****.*** linkedin.com/in/pujan-kabariya-58a4951b9 EDUCATION
Bachelor's of Science in Computer Engineering GPA: 3.2/ 4.0 The University of Texas at Dallas, Richardson, Texas Grad: December 2023
• UTD Comet Transfer and Active PTK Member - Scholarship Recipient
• Relevant Coursework: Computer Architecture, Data Structures and Algorithms, Computer Networks, Operating Systems and Concepts, Embedded Systems and Programming Languages Collin College, Frisco, TX - AS In Computer Engineering Grad: July 2020
• Collin College’s Dean’s List from Fall 2018 – 2019 TECHNICAL SKILLS
Programming Languages: C, C++, Java, Python, JavaScript, and Verilog Software and Framework: Rest API, SOAP API, Angular, Splunk, Unix/Linux, Eclipse, Visual Studio, IntelliJ, Cadence Allegro PSpice PCB Design and Analysis Utilities Software, and Keil MDK-Arm Dev Tools WORK EXPERIENCE
Comfort INN Hotel, Deming, NM May 2015 – August 2017 Hotel Engineering Intern
• Proficient in hotel management software, with a strong grasp of check-in and check-out processes
• Demonstrated expertise in hotel maintenance tasks, encompassing door lock updates, camera repairs, and staff training in new software applications for hotel computers.
• Adept at analyzing and optimizing hotel costs to adapt to fluctuations in business demand. ACADEMIC PROJECTS
Parallel CCAMA Optimization OpenMP January 2023 – December 2023
• Led the successful optimization of Dr. Armin Zare's CCAMA in C++ for a mass-spring-damper system, correcting previous issues and improving efficiency using OpenMP, with a focus on crucial computational bottlenecks, notably matrix operations, significantly improving code for effective use in high "n-states" scenarios. RLC Steady-State Analysis Cadence Allegro PSpice PCB Design April 2022
• Attained a comprehensive understanding of RLC circuit behaviors across a range of frequencies while proficiently employing PSpice software to design and analyze circuits, showcasing a seamless workflow from virtual circuit creation to practical lab implementation.
Operational Amplifiers (Op Amps) Cadence Allegro PSpice PCB Design October 2023
• Leveraged PSpice to construct a difference amplifier, while validating results through waveform analysis to ensure accuracy.
Multicycle Data Path Verilog January 2022 – May 2023
• Developed and initiated the project with a customized Instruction Set Architecture (ISA) design and specification, progressing to Verilog utilization for subsequent implementation and simulation phases. AFFILIATIONS
Shree Swaminarayan Gurukul, Dallas, TX Event Volunteer Lead 2018-2023
• Efficiently coordinated and managed a wide array of events, encompassing the Back-to-School Carnival, Food Drive, while also expertly installing cameras and advanced LED lighting systems throughout the facility Saurashtra Patel Cultural Samaj (SPCS), Dallas, TX Stage Coordinator Lead 2021-2023
• Oversaw stage light upgrades, wiring, and pre-event testing for flawless functionality, while also managing real- time control of projectors and lighting, including adjustments of lighting during speeches and performances
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