| Resume alert | Resumes 11 - 20 of 34 |
Quality Assurance Engineer Test Engineer
Columbus, OH
... MATLAB, Simple Scalar, Cadence Virtuoso, PSpice, LabVIEW and Multisim, AUTOCAD – E,Wireshark,CoolTerm, U-Con,Appium. ... guide Jan 2019 IC Design Process: A Beginner's Overview to VLSI Technology Jan 2019 Technical Experience Latch, New York ... - 2020 Aug 31
... MATLAB, Simple Scalar, Cadence Virtuoso, PSpice, LabVIEW and Multisim, AUTOCAD – E,Wireshark,CoolTerm, U-Con,Appium. ... guide Jan 2019 IC Design Process: A Beginner's Overview to VLSI Technology Jan 2019 Technical Experience Latch, New York ... - 2020 Aug 31
Quality Engineer Scrum
Columbus, OH
... user stories, facilitating team cadence meetings, and responding quickly to change 9 years’ experience working with JIRA, Confluence, and HP ALM Removed Scrum Team roadblocks and escalated blockers to management Enthusiastic Agile Scrum Master; ... - 2019 Nov 05
... user stories, facilitating team cadence meetings, and responding quickly to change 9 years’ experience working with JIRA, Confluence, and HP ALM Removed Scrum Team roadblocks and escalated blockers to management Enthusiastic Agile Scrum Master; ... - 2019 Nov 05
Project Scrum
Columbus, OH
... Involved in 2017 upgrade build and testing activities for Cadence and Prelude. Participated in PRCT, Unit and Regression testing activities using HPALM. Provide suggestions for continues improvements to the department directors and admins. Scripps ... - 2019 May 01
... Involved in 2017 upgrade build and testing activities for Cadence and Prelude. Participated in PRCT, Unit and Regression testing activities using HPALM. Provide suggestions for continues improvements to the department directors and admins. Scripps ... - 2019 May 01
Design Engineer Electrical
Columbus, OH
... • Developed Algorithms in VHDL to implement image processing on FPGA using Lattice Diamond. Technical Skills Aakriti Barat: Page 2 of 2 • Lattice Semiconductors: ECP3 family, FPGA – SPARTAN 3E, VLSI, RF MEMS (Switches, Varactors, Inductors). • ... - 2019 Mar 27
... • Developed Algorithms in VHDL to implement image processing on FPGA using Lattice Diamond. Technical Skills Aakriti Barat: Page 2 of 2 • Lattice Semiconductors: ECP3 family, FPGA – SPARTAN 3E, VLSI, RF MEMS (Switches, Varactors, Inductors). • ... - 2019 Mar 27
Training Manager
New Albany, OH
... ClinDoc OpTime/Anesthesia Module Stork Radiant Epic Consultant for additional modules: Dragon Home Health HIM Beacon ADT/Cadence Willow Professional Experience Houston Methodist Hospital 03/2016 – 07/2018Ambulatory Clinical Analyst III Managed, ... - 2018 Nov 05
... ClinDoc OpTime/Anesthesia Module Stork Radiant Epic Consultant for additional modules: Dragon Home Health HIM Beacon ADT/Cadence Willow Professional Experience Houston Methodist Hospital 03/2016 – 07/2018Ambulatory Clinical Analyst III Managed, ... - 2018 Nov 05
Project Manager
Columbus, OH
... product vision Created mapping document for articles/documents/content types using SIPOC methodology Facilitated Scrum cadence events such as Daily Scrum, Sprint Planning, Sprint Review, and Sprint Retrospective Facilitated weekly user story ... - 2018 Oct 15
... product vision Created mapping document for articles/documents/content types using SIPOC methodology Facilitated Scrum cadence events such as Daily Scrum, Sprint Planning, Sprint Review, and Sprint Retrospective Facilitated weekly user story ... - 2018 Oct 15
Masters graduate in Electrical and computer engineering
Columbus, OH
... (Elementary Level) • Platforms : Windows, Linux • Tools : Cadence, Xilinx ISE, MATLAB, ModelSim (Intel FPGA), Quartus Prime, TopSPICE, FIO, Vdbench, HDParm RELEVANT COURSES Graduate: Mixed Signal VLSI, HDL Verification, Computer Architecture, Image ... - 2018 Jul 27
... (Elementary Level) • Platforms : Windows, Linux • Tools : Cadence, Xilinx ISE, MATLAB, ModelSim (Intel FPGA), Quartus Prime, TopSPICE, FIO, Vdbench, HDParm RELEVANT COURSES Graduate: Mixed Signal VLSI, HDL Verification, Computer Architecture, Image ... - 2018 Jul 27
Project Electrical Engineering
Columbus, OH
... Academic Projects: Graduate Project Experience: Implemented six input logic gates in CMOS using Magic Layout Simulated the magic VLSI circuit using LT spice IV. Software: LT spice IV, magic VLSI tool. Academic Achievements •Secured 1st prize and ... - 2018 May 30
... Academic Projects: Graduate Project Experience: Implemented six input logic gates in CMOS using Magic Layout Simulated the magic VLSI circuit using LT spice IV. Software: LT spice IV, magic VLSI tool. Academic Achievements •Secured 1st prize and ... - 2018 May 30
Senior Program / Project Manager
Columbus, OH
... engagement, defining realistic timelines and estimates, managing ambiguity, mitigating risks, deliverable cadence, communication, evaluating benefits realization, providing best practice protocols, and controlling: costs, scope and schedules. ... - 2018 Feb 05
... engagement, defining realistic timelines and estimates, managing ambiguity, mitigating risks, deliverable cadence, communication, evaluating benefits realization, providing best practice protocols, and controlling: costs, scope and schedules. ... - 2018 Feb 05
Electrical Engineer Engineering
Westerville, OH
... Software Proficiency: Languages : C, C++, Java, VHDL and Verilog Operating Systems: Linux, Windows Applications : MATLAB, Cadence, Altera Quartus (FPGA), Mentor Graphics (Tanner, Pyxis), OrCAD, Altium Designer, PCB Wizard, Proteus, MS Office, Athena ... - 2017 Jul 12
... Software Proficiency: Languages : C, C++, Java, VHDL and Verilog Operating Systems: Linux, Windows Applications : MATLAB, Cadence, Altera Quartus (FPGA), Mentor Graphics (Tanner, Pyxis), OrCAD, Altium Designer, PCB Wizard, Proteus, MS Office, Athena ... - 2017 Jul 12