| Resume alert | Resumes 61 - 68 of 68 |
Engineer Design
Oakville, ON, Canada
Tannu Sharma Senior Application Engineer at Cadence Design Systems Tannu Sharma E-mail: abp5xb@r.postjobfree.com EDUCATION Masters of Sciences in Electronics July 2006 - Jun 2008 Department of Electronics Science, South Campus, University of Delhi, ... - 2013 Jan 01
Tannu Sharma Senior Application Engineer at Cadence Design Systems Tannu Sharma E-mail: abp5xb@r.postjobfree.com EDUCATION Masters of Sciences in Electronics July 2006 - Jun 2008 Department of Electronics Science, South Campus, University of Delhi, ... - 2013 Jan 01
Engineer Sql Server
Toronto, ON, Canada
... SKILLS Experience in board level design and characterization for a wireless application (BlackBerry) Software Tools: Cadence (Capture, PSpice), LabVIEW, Agilent VEE, LabWindows/CVI, AutoCAD Altera and Xilinx FPGAs, VHDL, Assembly Languages: C/C ... - 2013 Jan 01
... SKILLS Experience in board level design and characterization for a wireless application (BlackBerry) Software Tools: Cadence (Capture, PSpice), LabVIEW, Agilent VEE, LabWindows/CVI, AutoCAD Altera and Xilinx FPGAs, VHDL, Assembly Languages: C/C ... - 2013 Jan 01
Engineer Design
Toronto, ON, Canada
... Simulation with Mentor ModelSim, Cadence Expert Currently used 15 years exp. Design digital logic with FPGA Expert Currently used 13 years exp. Standard communication protocols such as USB, I2C, SPI, RS232 currently used 10 years exp. Verification ... - 2012 Dec 06
... Simulation with Mentor ModelSim, Cadence Expert Currently used 15 years exp. Design digital logic with FPGA Expert Currently used 13 years exp. Standard communication protocols such as USB, I2C, SPI, RS232 currently used 10 years exp. Verification ... - 2012 Dec 06
Electrical Years Experience
Toronto, ON, Canada
... & SIMULATION SKILLS: 3 years experience Verilog/VHDL design, Altera Quartus II (TimeQuest for timing analysis), and Xilinx ISE Mentor Graphics ModelSim for FPGA simulation and verification Cadence Allegro to review and debug PCB designs MATLAB, ... - 2012 Nov 21
... & SIMULATION SKILLS: 3 years experience Verilog/VHDL design, Altera Quartus II (TimeQuest for timing analysis), and Xilinx ISE Mentor Graphics ModelSim for FPGA simulation and verification Cadence Allegro to review and debug PCB designs MATLAB, ... - 2012 Nov 21
Developer Software
Richmond Hill, ON, l4s 0a2, Canada
... Cadence Design Systems Inc, Ottawa, ON 2002-2004 Software Developer Electronic Design Automation for IC and Packaging Co-design • One of developers of GUI based electronic design automation tool to reduce the cost and timing for Chip design and IC ... - 2012 Nov 01
... Cadence Design Systems Inc, Ottawa, ON 2002-2004 Software Developer Electronic Design Automation for IC and Packaging Co-design • One of developers of GUI based electronic design automation tool to reduce the cost and timing for Chip design and IC ... - 2012 Nov 01
Engineer Design
Brampton, ON, Canada
... SUMMARY OF TECHNICAL SKILLS Schematic & Layout Design : Cadence OPUS, VXL, Calibre, P&R Synopsys : Railmill, Powermill,Design Analyzer Simulation Tools : Mentor Graphics (ELDO, Xelga),Avanti (Hercules, HSPICE) HSIM and Spectre RC Extraction Tools : ... - 2012 Oct 05
... SUMMARY OF TECHNICAL SKILLS Schematic & Layout Design : Cadence OPUS, VXL, Calibre, P&R Synopsys : Railmill, Powermill,Design Analyzer Simulation Tools : Mentor Graphics (ELDO, Xelga),Avanti (Hercules, HSPICE) HSIM and Spectre RC Extraction Tools : ... - 2012 Oct 05
Engineer Design
Toronto, ON, Canada
... digital and analog circuits, designs, tests, and PCB layout using design programs (AutoCAD Electrical 2010, Matlab, Simulink, Cadence PSpice A/D, Cadence OrCAD and VHDL)Excellent in the use of computer and CAD software (MicroSoft office, WordPerfect ... - 2012 Oct 05
... digital and analog circuits, designs, tests, and PCB layout using design programs (AutoCAD Electrical 2010, Matlab, Simulink, Cadence PSpice A/D, Cadence OrCAD and VHDL)Excellent in the use of computer and CAD software (MicroSoft office, WordPerfect ... - 2012 Oct 05
Manager Testing
Toronto, ON, m1t 3g4, Canada
... (2yrs), Jmeter (1yr), OpenSTA (1yr), QTP (2yrs), Selenium (2yrs), Java Script, QC (2yrs), Lotus Notes, AutoCAD, OrCAD Cadence, Xilinx-ISE, PSpice, Firebug Network Skills: Monitoring network traffic, configuring router, server, and hubs, install ... - 2012 Aug 15
... (2yrs), Jmeter (1yr), OpenSTA (1yr), QTP (2yrs), Selenium (2yrs), Java Script, QC (2yrs), Lotus Notes, AutoCAD, OrCAD Cadence, Xilinx-ISE, PSpice, Firebug Network Skills: Monitoring network traffic, configuring router, server, and hubs, install ... - 2012 Aug 15