| Resume alert | Resumes 21 - 30 of 34 |
Design Project
San Jose, CA, 95123
... Extensive experience with functional verification tool such as Cadence LEC on 45nm and 32nm designs, physical design tool such as Soc Encounter, timing analysis tool such as Primetime which targeted various market segments such as Wireless USB, USB ... - 2010 Aug 24
... Extensive experience with functional verification tool such as Cadence LEC on 45nm and 32nm designs, physical design tool such as Soc Encounter, timing analysis tool such as Primetime which targeted various market segments such as Wireless USB, USB ... - 2010 Aug 24
Design Engineer
San Jose, CA, 95138
... Vendor tools from Cadence, Synopsys DC and DC-topo, Modelsim, ISE, Synplicity, and Debussy. Designed MAC layer for 802.11abg systems PROFESSIONAL EXPERIENCE: Consulting services for Altera, Cisco Systems, Sun Microsystems, Sony Corp. LTX, Advansys, ... - 2010 Aug 20
... Vendor tools from Cadence, Synopsys DC and DC-topo, Modelsim, ISE, Synplicity, and Debussy. Designed MAC layer for 802.11abg systems PROFESSIONAL EXPERIENCE: Consulting services for Altera, Cisco Systems, Sun Microsystems, Sony Corp. LTX, Advansys, ... - 2010 Aug 20
Engineer Electrical
Santa Cruz, CA, 95065
... Cadence Design Systems, Inc., San Jose, CA Senior Technical Recruiter, 7/00 - 12/02 . Responsible for recruiting technical professionals within the area of Research and Development. Sourced, recruited, interviewed, and filled requisitions. . Worked ... - 2010 Aug 19
... Cadence Design Systems, Inc., San Jose, CA Senior Technical Recruiter, 7/00 - 12/02 . Responsible for recruiting technical professionals within the area of Research and Development. Sourced, recruited, interviewed, and filled requisitions. . Worked ... - 2010 Aug 19
Project Manager Sales
San Jose, CA, 95138
... Design Tools: Mentor Graphics, Cadence Allegro, Valor Genesis, Cad/Cam, Coopers and Chyan Technologies Auto router (now Allegro), AutoCAD/Auto Desk, PADs PCB 0. Principal Customers: Centillion Networks, Bay Networks, Foundry Networks, Lockheed ... - 2010 Jul 27
... Design Tools: Mentor Graphics, Cadence Allegro, Valor Genesis, Cad/Cam, Coopers and Chyan Technologies Auto router (now Allegro), AutoCAD/Auto Desk, PADs PCB 0. Principal Customers: Centillion Networks, Bay Networks, Foundry Networks, Lockheed ... - 2010 Jul 27
Engineer Manager
San Martin, CA, 95046
... (Raytheon) - Total Quality Management San Diego State - Organize and Manage a Preventive Maintenance Program Preventive Maintenance of Wafer Fab Equipment Project Management (Cadence Management) - Manage projects ERT Training - Mission College - 2010 Jul 18
... (Raytheon) - Total Quality Management San Diego State - Organize and Manage a Preventive Maintenance Program Preventive Maintenance of Wafer Fab Equipment Project Management (Cadence Management) - Manage projects ERT Training - Mission College - 2010 Jul 18
Customer Service Engineer
San Jose, CA, 95135
... Developed a re-configurable FPGA based real-time target detection system for multispectral and hyperspectral remote sensing applications (VHDL, Verilog, Xilinx, ModelSim, Cadence) . Designed a parallel hyperspectral image processing system that ... - 2010 Jul 08
... Developed a re-configurable FPGA based real-time target detection system for multispectral and hyperspectral remote sensing applications (VHDL, Verilog, Xilinx, ModelSim, Cadence) . Designed a parallel hyperspectral image processing system that ... - 2010 Jul 08
Engineer Design
San Jose, CA, 95136
... Developed scripts to manage signal integrity, to prevent coupling noise on high frequency signals (2GHz), power routes with Cadence Chip Assemble Router (CCAR). Effectively working on floor plan with Virtuoso_XL, Assura . Familiar with physical ... - 2010 Jun 21
... Developed scripts to manage signal integrity, to prevent coupling noise on high frequency signals (2GHz), power routes with Cadence Chip Assemble Router (CCAR). Effectively working on floor plan with Virtuoso_XL, Assura . Familiar with physical ... - 2010 Jun 21
Engineer Design
San Jose, CA, 95135
... Cadence: AMS, NC Verilog, Encounter RC, Encounter Test, SOC Encounter, Conformal, Spectre, Ultrasim . Synopsys : Design compiler, Test compiler, Prime Time . Mentor Graphics: Modelsim, Calibre . Denali memory compiler . IBM: Booledozer, LSSD/DFT ... - 2010 Jun 17
... Cadence: AMS, NC Verilog, Encounter RC, Encounter Test, SOC Encounter, Conformal, Spectre, Ultrasim . Synopsys : Design compiler, Test compiler, Prime Time . Mentor Graphics: Modelsim, Calibre . Denali memory compiler . IBM: Booledozer, LSSD/DFT ... - 2010 Jun 17
Manager Design
Gilroy, CA, 95020
... • • “Design-for-manufacturability” “Design-for-testability” • • Cadence Allegro, Releases 15.7 and 16.2 Cadence Auto-Router (Spectra) • • Mentor Graphics Expedition Auto- Valor, PCB fabrication analysis and Router/DxDesigner Manual Router ... - 2010 May 17
... • • “Design-for-manufacturability” “Design-for-testability” • • Cadence Allegro, Releases 15.7 and 16.2 Cadence Auto-Router (Spectra) • • Mentor Graphics Expedition Auto- Valor, PCB fabrication analysis and Router/DxDesigner Manual Router ... - 2010 May 17
Human Resources Sales
Morgan Hill, CA, 95037
... Business Partner, WW Field Ops, Cadence Design Systems, Inc., 2001 to 2003 . Post-acquisition, promoted and recruited by Executive VP of WW Field Operations as a strategic business partner. . Redesigned complex field compensation plan to drive ... - 2010 Mar 10
... Business Partner, WW Field Ops, Cadence Design Systems, Inc., 2001 to 2003 . Post-acquisition, promoted and recruited by Executive VP of WW Field Operations as a strategic business partner. . Redesigned complex field compensation plan to drive ... - 2010 Mar 10