| Resume alert | Resumes 71 - 80 of 423 |
Graphic Designer Project
Vasant Nagar, Karnataka, India
... C, C++, Verilog HDL-Xilinx, Matlab, Embedded C- Keil, ARM Cortex-M3, VLSI-Cadence Microprocessor -8086 and MicroController-MSP430 PROJECT AND INTERNSHIP: Mini project in Verilog HDL- A digital alarm clock displays time in the LCD display format. ... - 2020 Feb 16
... C, C++, Verilog HDL-Xilinx, Matlab, Embedded C- Keil, ARM Cortex-M3, VLSI-Cadence Microprocessor -8086 and MicroController-MSP430 PROJECT AND INTERNSHIP: Mini project in Verilog HDL- A digital alarm clock displays time in the LCD display format. ... - 2020 Feb 16
Assistant Electrical
Bangalore, Karnataka, India
... TECHNICAL SKILLS Programming Languages: C, C++, python.,Java, Verilog Hardware:Arduino, Raspberry pi,89s52,Bolt, LPC11U24 Sođware: MATLAB and SIMULINK, Keil uVision,Proteus,Siemens step7, ECS- SCADA, Cadence, NS2, PSpice. ORGANISATIONS COMSNETS 2020 ... - 2020 Feb 11
... TECHNICAL SKILLS Programming Languages: C, C++, python.,Java, Verilog Hardware:Arduino, Raspberry pi,89s52,Bolt, LPC11U24 Sođware: MATLAB and SIMULINK, Keil uVision,Proteus,Siemens step7, ECS- SCADA, Cadence, NS2, PSpice. ORGANISATIONS COMSNETS 2020 ... - 2020 Feb 11
Power System
Vasant Nagar, Karnataka, India
... ***-**** LINKEDIN mahesh-krishna-400748136 SKILLS OPERATING SYSTEM • WINDOWS • UNIX TOOLS • MS WORD • MS EXCEL • MS POWERPOINT • CADENCE • LABVIEW • MI-POWER PROGRAMMING LANGUAGES • SYSTEM VERILOG • VERILOG • VHDL • HTML MAHESH KRISHNA K WORKSHOPS - ... - 2020 Feb 06
... ***-**** LINKEDIN mahesh-krishna-400748136 SKILLS OPERATING SYSTEM • WINDOWS • UNIX TOOLS • MS WORD • MS EXCEL • MS POWERPOINT • CADENCE • LABVIEW • MI-POWER PROGRAMMING LANGUAGES • SYSTEM VERILOG • VERILOG • VHDL • HTML MAHESH KRISHNA K WORKSHOPS - ... - 2020 Feb 06
Design Engineer Engineering
Vasant Nagar, Karnataka, India
... SKILLS Proficient in Cadence Allegro Schematic and Layout tools. Designed up to 6 layers. Knowledge of Signal integrity and design analysis. Maintained and updated symbols and footprint libraries for schematic. Management of Bill of Material and ... - 2020 Feb 05
... SKILLS Proficient in Cadence Allegro Schematic and Layout tools. Designed up to 6 layers. Knowledge of Signal integrity and design analysis. Maintained and updated symbols and footprint libraries for schematic. Management of Bill of Material and ... - 2020 Feb 05
Design Engineer
Vasant Nagar, Karnataka, India
... SCL-32nm technology node using H-spice tool by synopsys.schematic and Layout of the SRAM cell is design and generated using Cadence virtuoso(schematics and layout) and DRC and LVS is verified using cadence (Assura)and simulation is done using Cadence ... - 2020 Feb 05
... SCL-32nm technology node using H-spice tool by synopsys.schematic and Layout of the SRAM cell is design and generated using Cadence virtuoso(schematics and layout) and DRC and LVS is verified using cadence (Assura)and simulation is done using Cadence ... - 2020 Feb 05
Engineer Design
Bangalore, Karnataka, India
... Trained in many Cadence automation tools, SKILLCAD/Modgen. Skills & Experience ●Experience with 14nm, 16nm, 28nm, 32nm, 65nm, 90nm, and 130nm and SOI technologies. ●Analog/ High speed / SerDes layout techniques. ●RF concepts like TLine usage, Curved ... - 2020 Feb 01
... Trained in many Cadence automation tools, SKILLCAD/Modgen. Skills & Experience ●Experience with 14nm, 16nm, 28nm, 32nm, 65nm, 90nm, and 130nm and SOI technologies. ●Analog/ High speed / SerDes layout techniques. ●RF concepts like TLine usage, Curved ... - 2020 Feb 01
Electronics and Communication Engineering
Bangalore, Karnataka, India
... TECHNICAL SKILLS ELECTRONICS DESIGN TOOLS : MATLAB, VERILOG, CADENCE SCRIPTING LANGUAGES : JavaScript DATABASE : SQL O.S. : Windows Family (XP, 7,8,10), Red Hat Linux, Ubuntu PROGRAMING LANGUAGES : C, C++, JAVA NON-TECHNICAL SKILLS Good ... - 2019 Dec 09
... TECHNICAL SKILLS ELECTRONICS DESIGN TOOLS : MATLAB, VERILOG, CADENCE SCRIPTING LANGUAGES : JavaScript DATABASE : SQL O.S. : Windows Family (XP, 7,8,10), Red Hat Linux, Ubuntu PROGRAMING LANGUAGES : C, C++, JAVA NON-TECHNICAL SKILLS Good ... - 2019 Dec 09
Engineer Design
Vasant Nagar, Karnataka, India
... Knowledge in Cadence Allegro design HDL concept Library creation for schematic both HDL and Or cad. BOM creation and optimization. CBA monitoring, interaction & co-ordination with customer during job execution. CORE COMPETENCIES: Strong Initiative ... - 2019 Nov 29
... Knowledge in Cadence Allegro design HDL concept Library creation for schematic both HDL and Or cad. BOM creation and optimization. CBA monitoring, interaction & co-ordination with customer during job execution. CORE COMPETENCIES: Strong Initiative ... - 2019 Nov 29
Engineering Project
Vasant Nagar, Karnataka, India
... software: MATLAB, PSPICE, Xilinx, Quartus Application Packages: MS office Design Tools: AutoCAD 2007(2D Modeling),Cadence Development tools & language: Quartus 13.0sp1, Xilinx 14.7,Keil uVison, C language, Assembly language, Verilog language ... - 2019 Nov 13
... software: MATLAB, PSPICE, Xilinx, Quartus Application Packages: MS office Design Tools: AutoCAD 2007(2D Modeling),Cadence Development tools & language: Quartus 13.0sp1, Xilinx 14.7,Keil uVison, C language, Assembly language, Verilog language ... - 2019 Nov 13
M.S. Office, Programming in C, Autocad
Vasant Nagar, Karnataka, India
... • Sponsorship Head – Team Hydra, RVCE DURATION: 2016-2017 Internship Company: Aditya Birla Online Fashion Duration: 45 days Worked on Google Analytics Projects • Automatic Gear Shift in Cycle based on Cadence and Incline – 4th sem Designed to shift ... - 2019 Oct 31
... • Sponsorship Head – Team Hydra, RVCE DURATION: 2016-2017 Internship Company: Aditya Birla Online Fashion Duration: 45 days Worked on Google Analytics Projects • Automatic Gear Shift in Cycle based on Cadence and Incline – 4th sem Designed to shift ... - 2019 Oct 31