| Resume alert | Resumes 11 - 20 of 1388 |
Mr
Shimla, Himachal Pradesh, India
... Audit as well as call recording and complaint management email transactions for LOB wise Cadence Super-Audits with external auditors for client- Maruti Suzuki India Limited Faciliated periodic re-audit done basis calibration with external auditors; ... - 2023 Dec 14
... Audit as well as call recording and complaint management email transactions for LOB wise Cadence Super-Audits with external auditors for client- Maruti Suzuki India Limited Faciliated periodic re-audit done basis calibration with external auditors; ... - 2023 Dec 14
Senior Software Engineer
Hyderabad, Telangana, India
... in the MCLH (MyCareLink Heart) Mobile App and Azure Test Pipelines, guaranteeing smooth integration into quarterly cadence releases Proficient in formulating test planning and strategic approaches to ensure the seamless execution of quarterly ... - 2023 Oct 28
... in the MCLH (MyCareLink Heart) Mobile App and Azure Test Pipelines, guaranteeing smooth integration into quarterly cadence releases Proficient in formulating test planning and strategic approaches to ensure the seamless execution of quarterly ... - 2023 Oct 28
Machine Learning Image Processing
VasanthaNagar, Karnataka, 560001, India
... India 2017 • Percentage - 84.32 % Professional Experience • Machine Learning With Python intern 1 Month • Training for Cadence based on VLSI design - AIET 1 Month Projects C++ Arduino uno VB • Smart Parking System And Cloud Computing Python ... - 2023 Oct 16
... India 2017 • Percentage - 84.32 % Professional Experience • Machine Learning With Python intern 1 Month • Training for Cadence based on VLSI design - AIET 1 Month Projects C++ Arduino uno VB • Smart Parking System And Cloud Computing Python ... - 2023 Oct 16
High Speed Process Engineer
Chennai, Tamil Nadu, India
... •Attended a course on “CUSTOM IC DESIGN USING CADENCE EDA TOOL” at Dr.Mahalingam College of Engineering and Technology,Pollachi,2015. IN-PLANT TRAINING •Undergone In-Plant training at BSNL EXCHANGE (VALPARAI) on 27-05-2015 to 28-05-2015. GROUP ... - 2023 Oct 10
... •Attended a course on “CUSTOM IC DESIGN USING CADENCE EDA TOOL” at Dr.Mahalingam College of Engineering and Technology,Pollachi,2015. IN-PLANT TRAINING •Undergone In-Plant training at BSNL EXCHANGE (VALPARAI) on 27-05-2015 to 28-05-2015. GROUP ... - 2023 Oct 10
Change Management Pcb Design
VasanthaNagar, Karnataka, 560001, India
... Worked on Sales Force queries, Taxonomy, PCB Design using OrCAD Cadence Allegro. Educational Details: Qualification Name of the Institute/University Percentage S.S.L.C Narendra High School, Gandhinagar, Bangalore-09/ Karnataka Secondary Board 75.66% ... - 2023 Oct 08
... Worked on Sales Force queries, Taxonomy, PCB Design using OrCAD Cadence Allegro. Educational Details: Qualification Name of the Institute/University Percentage S.S.L.C Narendra High School, Gandhinagar, Bangalore-09/ Karnataka Secondary Board 75.66% ... - 2023 Oct 08
Design Engineer High Speed
Chennai, Tamil Nadu, India
... Telephone +918********* adzwp5@r.postjobfree.com CAREER OBJECTIVE: PCB DESIGN ENGINEER Objective To apply my knowledge and 3 years’ experience in PCB designing and to develop efficient and effective systems using my skills in Altium, Cadence Allegro ... - 2023 Sep 24
... Telephone +918********* adzwp5@r.postjobfree.com CAREER OBJECTIVE: PCB DESIGN ENGINEER Objective To apply my knowledge and 3 years’ experience in PCB designing and to develop efficient and effective systems using my skills in Altium, Cadence Allegro ... - 2023 Sep 24
Cadence and verilog hardware description language.
Bangalore, Karnataka, India
PANDU GAUTHAM Email: adzmjh@r.postjobfree.com Address: D.no- 2-244/7,cheediga revenue colony, Kakinada,Kakinada Dist.,Andhra Pradesh ,India. pin- 533006. Phone: 949-***-**** CAREER OBJECTIVE Secure a responsible career opportunity to fully utilize... - 2023 Sep 11
PANDU GAUTHAM Email: adzmjh@r.postjobfree.com Address: D.no- 2-244/7,cheediga revenue colony, Kakinada,Kakinada Dist.,Andhra Pradesh ,India. pin- 533006. Phone: 949-***-**** CAREER OBJECTIVE Secure a responsible career opportunity to fully utilize... - 2023 Sep 11
Verilog coding
Visakhapatnam, Andhra Pradesh, India
... 2016, visakhapatnam, 65% SKILLS verilog coding basics of c programming c++ Basics of java and python commuication skills problem solving team work can work under stressed conditions basic computer knowledge time management can handle cadence,linux. ... - 2023 Sep 11
... 2016, visakhapatnam, 65% SKILLS verilog coding basics of c programming c++ Basics of java and python commuication skills problem solving team work can work under stressed conditions basic computer knowledge time management can handle cadence,linux. ... - 2023 Sep 11
Control Systems Fpga Design
Visakhapatnam, Andhra Pradesh, India
... AP 10th grade (2014) CGPA - 7.0 Specializations Areas of interest Technical Skills: Digital Circuits,Verilog Verilog,Cadence,C,Ptyhon(basics) ASIC, FPGA, Cadence(RTL-GDS) Simulation Software: Cadence Virtuoso, TopSpice, Xilinx Vivado Projects ... - 2023 Sep 11
... AP 10th grade (2014) CGPA - 7.0 Specializations Areas of interest Technical Skills: Digital Circuits,Verilog Verilog,Cadence,C,Ptyhon(basics) ASIC, FPGA, Cadence(RTL-GDS) Simulation Software: Cadence Virtuoso, TopSpice, Xilinx Vivado Projects ... - 2023 Sep 11
Engineer
Davanagere, Karnataka, India
... TOOLS LEARNT: • Cadence virtuoso schematic editor • Cadence virtuoso layout editor, Calibre, Assura. INTERNSHIP: • Evo-trix technologies private limited Circuit design and layout design of Inverter (1x, 2x, 4x, 16x, 32x) with 180nm technology by ... - 2023 Aug 29
... TOOLS LEARNT: • Cadence virtuoso schematic editor • Cadence virtuoso layout editor, Calibre, Assura. INTERNSHIP: • Evo-trix technologies private limited Circuit design and layout design of Inverter (1x, 2x, 4x, 16x, 32x) with 180nm technology by ... - 2023 Aug 29