Sign in

Layout Design

Ramona, California, 92065, United States
March 18, 2019

Contact this candidate


Name: Gerrit Groenewold IV Email:

Address: P.O. Box 3327 Ramona, CA 92065 Cell: 760-***-**** Overview:

Works well in groups and independently. Enthusiastic about engineering and other technology subjects, as well as a quick learner and eager to learn more. A good team player, always ready to help others.


Silicon Drafting Institute, San Jose, California. (Jun. 2018 – Dec. 2018) Skills taught

How to read and understand schematics and logic, both primitive and complex, and being able to draw it in. Layout form in both standard cells and custom blocks.

Proficient in designing MOSFET.

Understand the manufacturing/fabrication process.

Worked with high speed/clock delay/sensitive circuits.

Knowledge of the function of resistors, inductors, and capacitors and how to implement them on layout.

Knowledge on how to avoid parasitic resistance and capacitance.

Skilled in both analog and digital circuits.

Understanding the important of matching by using common centroid, distance, alignment dummies, and shielding techniques using guard rings.


Layout experience

Proficient with a variety of Cadence programs and tools; VLE, VXL, PCELL, and Assura DRC/LVS/S-Check. As well as Cadence Dracula

Build a variety of standard cells, as well as dlatch, SRAM, pll, bias, and I/O devices.

Palomar CC, San Marcos, California 2013-2016.

General Education/Drafting & Design

Other skills

Computer Technician.

Design and built robots for F.I.R.S.T. Robotics Competition (2009-2015).

Designing using programs like Sketch-up, AutoCAD, Revit, and GIMP.

Knowledge in a Variety of other computer programs.

Contact this candidate