| Distance: | Resume alert | Resumes 51 - 60 of 6502 |
Physical Design, RTL Design in Verilog, Python and TCL Scripting
Tempe, AZ, 85281
Sarika Jothi Alwarappan 480-***-**** • ****************@*****.*** • https://www.linkedin.com/in/sarikaja/ Education M.S Computer Engineering (Electrical Engineering) Arizona State University May 2025 Coursework- Hardware Security and Trust, VLSI ... - Mar 31
Sarika Jothi Alwarappan 480-***-**** • ****************@*****.*** • https://www.linkedin.com/in/sarikaja/ Education M.S Computer Engineering (Electrical Engineering) Arizona State University May 2025 Coursework- Hardware Security and Trust, VLSI ... - Mar 31
Electrical Engineering North Texas
Denton, TX
... 8.67 Sri Chaitanya School June 2017– Apr 2018 Board of Secondary Education Relevant Coursework CGPA 8.8 •C Programming •VLSI Design Projects •Python •Digital Signal Processing •Fundamentals of JAVA •Digital System Design With VHDL STAR WAR GAMES ... - Mar 28
... 8.67 Sri Chaitanya School June 2017– Apr 2018 Board of Secondary Education Relevant Coursework CGPA 8.8 •C Programming •VLSI Design Projects •Python •Digital Signal Processing •Fundamentals of JAVA •Digital System Design With VHDL STAR WAR GAMES ... - Mar 28
Devops Engineer Solutions Architect
United States
... Education: •Masters in VLSI design from Manipal University (2014) •Bachelor’s degree from JNT University (2007 – 2011) - Mar 27
... Education: •Masters in VLSI design from Manipal University (2014) •Bachelor’s degree from JNT University (2007 – 2011) - Mar 27
Hardware Security Ic Design
Santa Clara, CA, 95054
... 14- Presenting my thesis at TTTC’s Doctoral Thesis Competition 42nd IEEE VLSI Test Symposium, Tempe, AZ, USA, April 22-24, 2024. 15- Attendee & Presenter 2024 CyLab Partners Conference, Pittsburgh, PA, USA, September 24-25, 2024. Thesis Committees ... - Mar 23
... 14- Presenting my thesis at TTTC’s Doctoral Thesis Competition 42nd IEEE VLSI Test Symposium, Tempe, AZ, USA, April 22-24, 2024. 15- Attendee & Presenter 2024 CyLab Partners Conference, Pittsburgh, PA, USA, September 24-25, 2024. Thesis Committees ... - Mar 23
Vice President North Carolina
Durham, NC, 27701
... IN BIOMEDICAL ENGINEERING • National Defense and Engineering Graduate Fellowship via DoD (5% award rate, $200,000 value) • Thesis: “VLSI Circuit models of Neuronal Dynamics and Synaptic Plasticity” • Published 12 papers in top scientific journals • ... - Mar 22
... IN BIOMEDICAL ENGINEERING • National Defense and Engineering Graduate Fellowship via DoD (5% award rate, $200,000 value) • Thesis: “VLSI Circuit models of Neuronal Dynamics and Synaptic Plasticity” • Published 12 papers in top scientific journals • ... - Mar 22
Power Electronics C++
Gainesville, FL
... Electrical and Electronics Engineering Anna University (CGPA: 3.5/4.0) Aug 2009-Apr 2013 Coursework: Computer Architecture, VLSI Circuits and Technology, Reconfigurable Computing, CAD for Hardware Security, Semiconductor Devices Fabrication, Digital ... - Mar 21
... Electrical and Electronics Engineering Anna University (CGPA: 3.5/4.0) Aug 2009-Apr 2013 Coursework: Computer Architecture, VLSI Circuits and Technology, Reconfigurable Computing, CAD for Hardware Security, Semiconductor Devices Fabrication, Digital ... - Mar 21
Data Analyst Analysis
Dallas, TX
... Sasi, Jawaharlal Nehru Technological University, Grade:3.8 Coursework: Communication Systems, Networking & Communication Protocols, VLSI, Data Structures and Algorithms, Probability, Statistics, DBMS, Signal Processing, Python Programming. ... - Mar 14
... Sasi, Jawaharlal Nehru Technological University, Grade:3.8 Coursework: Communication Systems, Networking & Communication Protocols, VLSI, Data Structures and Algorithms, Probability, Statistics, DBMS, Signal Processing, Python Programming. ... - Mar 14
Abu Dhabi High School
Abu Dhabi, United Arab Emirates
... Diploma In VLSI from Centre For Development of Advanced Computing (CDAC), Hyderabad, India (from 5th of Feb 2001 to 15th of June 2001). Passed Higher Secondary from St. Paul School, Rourkela, which is affiliated to ISC board in the year 1995. Passed ... - Mar 12
... Diploma In VLSI from Centre For Development of Advanced Computing (CDAC), Hyderabad, India (from 5th of Feb 2001 to 15th of June 2001). Passed Higher Secondary from St. Paul School, Rourkela, which is affiliated to ISC board in the year 1995. Passed ... - Mar 12
Electrical Engineer Fpga
Tel Aviv, Tel Aviv District, Israel
... Education: Electronics Engineer and Business Manager for engineers Graduated from the Technion Languages: Hebrew, English, French Programming: System Verilog, Verilog, VHDL, C VLSI SoC clock/voltage domain crossing, DFT, - Mar 11
... Education: Electronics Engineer and Business Manager for engineers Graduated from the Technion Languages: Hebrew, English, French Programming: System Verilog, Verilog, VHDL, C VLSI SoC clock/voltage domain crossing, DFT, - Mar 11
Digital Design Rtl
Portland, OR
... TECHNICAL TRAINING Maven Silicon: Advanced VLSI Design and Verification Trainee, Bangalore, India (Apr 2022 – May 2023) • Designed 1*3 Router and Developed the architecture of block level structure for the design. • Implemented RTL using Verilog and ... - Mar 06
... TECHNICAL TRAINING Maven Silicon: Advanced VLSI Design and Verification Trainee, Bangalore, India (Apr 2022 – May 2023) • Designed 1*3 Router and Developed the architecture of block level structure for the design. • Implemented RTL using Verilog and ... - Mar 06