| Resume alert | Resumes 11 - 20 of 101 |
Engineer Software
Buena Park, CA
... TERADYNE, Agoura Hills, CA TEST ENGINEER: June, 1984 to August, 1985 ● Responsible for J941 VLSI Automated Test System. Performed component level troubleshooting on digital and analog circuits in the system using diagnostic software and test ... - 2020 Apr 27
... TERADYNE, Agoura Hills, CA TEST ENGINEER: June, 1984 to August, 1985 ● Responsible for J941 VLSI Automated Test System. Performed component level troubleshooting on digital and analog circuits in the system using diagnostic software and test ... - 2020 Apr 27
Engineer Software
Placentia, CA
... TERADYNE, VLSI Test Equipment Division Mar 1998 – April 2004 Development Engineer: Develop Software and Test Strategies 1999 - 2004 Develop and implement high level hardware and software to characterize, calibrate, and test Teradyne test equipment ... - 2020 Apr 24
... TERADYNE, VLSI Test Equipment Division Mar 1998 – April 2004 Development Engineer: Develop Software and Test Strategies 1999 - 2004 Develop and implement high level hardware and software to characterize, calibrate, and test Teradyne test equipment ... - 2020 Apr 24
Design Electrical
Fullerton, CA
PUNIT PANDIT ● Fullerton, CA-***** adbitb@r.postjobfree.com 714-***-**** https://www.linkedin.com/in/panditpunit/ ● CAREER OBJECTIVE A highly motivated Master of Electrical Engineering with a specialization in VLSI, aiming to secure a design or ... - 2020 Jan 30
PUNIT PANDIT ● Fullerton, CA-***** adbitb@r.postjobfree.com 714-***-**** https://www.linkedin.com/in/panditpunit/ ● CAREER OBJECTIVE A highly motivated Master of Electrical Engineering with a specialization in VLSI, aiming to secure a design or ... - 2020 Jan 30
Electrical Engineer Design
Fullerton, CA
... of Engineering – Electronics Engineering Aug 2013 - Jul 2017 University of Mumbai, India GPA - 3.6 Relevant courses: VLSI Design and Verification, IC Technology, MEMS Technology, CMOS VLSI Design STRENGTHS AND EXPERTISE Interpersonal Skills: ... - 2020 Jan 30
... of Engineering – Electronics Engineering Aug 2013 - Jul 2017 University of Mumbai, India GPA - 3.6 Relevant courses: VLSI Design and Verification, IC Technology, MEMS Technology, CMOS VLSI Design STRENGTHS AND EXPERTISE Interpersonal Skills: ... - 2020 Jan 30
Electronic Engineer Design
Los Angeles, CA
... 5) Expert using VHDL, VLSI, Verilog, FPGA(Xilinx), SQL, C, C++,AUTOCAD, Basic, QBasic, MASM, NASM. 6) Knowledge of .NET, Visual C++, Visual Basic, JAVA, PASCAL, LISP, PROLOG, GWBasic, and PBasic. 7) Designing microchips using current Metal/Alloy ... - 2019 Nov 30
... 5) Expert using VHDL, VLSI, Verilog, FPGA(Xilinx), SQL, C, C++,AUTOCAD, Basic, QBasic, MASM, NASM. 6) Knowledge of .NET, Visual C++, Visual Basic, JAVA, PASCAL, LISP, PROLOG, GWBasic, and PBasic. 7) Designing microchips using current Metal/Alloy ... - 2019 Nov 30
Design Engineer,Embedded System, VLSI, Verification, Test, C, C++
Los Angeles, CA
... Los Angeles, CA Expected May 2019 Courses: Digital System Design (EE560), Advanced Computer Architecture (EE557), VLSI System Design (EE577b, EE577a), Diagnosis and Design of Reliable Digital Systems (EE658), Computer Aided Design (EE681), ... - 2019 Jan 25
... Los Angeles, CA Expected May 2019 Courses: Digital System Design (EE560), Advanced Computer Architecture (EE557), VLSI System Design (EE577b, EE577a), Diagnosis and Design of Reliable Digital Systems (EE658), Computer Aided Design (EE681), ... - 2019 Jan 25
Computer Engineering System
Los Angeles, CA
... PES Institute of Technology, Bangalore May 2017 Bachelor of Engineering, Electronics and Computer Engineering Related Coursework: Low Power VLSI Design, Advanced Digital Design, Real-Time Operating Systems. SKILLS: Programming Languages: C++, C, ... - 2019 Jan 23
... PES Institute of Technology, Bangalore May 2017 Bachelor of Engineering, Electronics and Computer Engineering Related Coursework: Low Power VLSI Design, Advanced Digital Design, Real-Time Operating Systems. SKILLS: Programming Languages: C++, C, ... - 2019 Jan 23
Hardware Engineer
Fullerton, CA
... Education MS, Electrical and Electronics Engineering California State University Fullerton, CA Jan 2017- Dec 2018 • Coursework: Introduction to VLSI Design, VLSI Design and Nanotechnology Device, CMOS VLSI Design, VLSI Testing and Design for ... - 2019 Jan 21
... Education MS, Electrical and Electronics Engineering California State University Fullerton, CA Jan 2017- Dec 2018 • Coursework: Introduction to VLSI Design, VLSI Design and Nanotechnology Device, CMOS VLSI Design, VLSI Testing and Design for ... - 2019 Jan 21
Electrical Engineering Design
Los Angeles, CA
Yuntao SONG ac7jq7@r.postjobfree.com 626-***-**** EDUCATION Aug 2017 - May 2019 UNIVERSITY OF SOUTHERN CALIFORNIA -Electrical Engineering, Master of Science GPA 3.38(3.92 excluding 1st semester) -Courses: EE580(System Verification), 577AB(VLSI ... - 2018 Oct 30
Yuntao SONG ac7jq7@r.postjobfree.com 626-***-**** EDUCATION Aug 2017 - May 2019 UNIVERSITY OF SOUTHERN CALIFORNIA -Electrical Engineering, Master of Science GPA 3.38(3.92 excluding 1st semester) -Courses: EE580(System Verification), 577AB(VLSI ... - 2018 Oct 30
Design Electrical Engineering
Los Angeles, CA
... University of Southern California, Los Angeles, U.S.A August 2016 – May 2018 Masters of Science, Electrical Engineering (VLSI Design and Computer Architecture) GPA : 3.53/4.00 Coursework: •EE 457: Computer Systems Organization •EE 477: MOS VLSI ... - 2018 Jul 17
... University of Southern California, Los Angeles, U.S.A August 2016 – May 2018 Masters of Science, Electrical Engineering (VLSI Design and Computer Architecture) GPA : 3.53/4.00 Coursework: •EE 457: Computer Systems Organization •EE 477: MOS VLSI ... - 2018 Jul 17