| Resume alert | Resumes 21 - 30 of 201 |
Electrical and computer engineering
Los Angeles, CA
... in Electrical Engineering GPA: 3.95/4.00 Skills Tools: Cadence virtuoso, Multisim, Altium Designer, Eclipse, STM32CUBEMX, Vscode, Visual studio, Modelsim, Vivado Programming Languages: C/C++/Embedded C, UVM, Verilog/SystemVerilog, MATLAB, Html/CSS, ... - 2020 Dec 18
... in Electrical Engineering GPA: 3.95/4.00 Skills Tools: Cadence virtuoso, Multisim, Altium Designer, Eclipse, STM32CUBEMX, Vscode, Visual studio, Modelsim, Vivado Programming Languages: C/C++/Embedded C, UVM, Verilog/SystemVerilog, MATLAB, Html/CSS, ... - 2020 Dec 18
Engineer Software
Lakewood, CA
... • FPGA development: Writing the software to build a ping-pong score monitor using “Lattice” semi-conductor FPGA chip and VeriLog. • C++ game development: Developing highly cohesive modules with minimal coupling using Design Patterns to build a video ... - 2020 Nov 16
... • FPGA development: Writing the software to build a ping-pong score monitor using “Lattice” semi-conductor FPGA chip and VeriLog. • C++ game development: Developing highly cohesive modules with minimal coupling using Design Patterns to build a video ... - 2020 Nov 16
Student at University of Southern California
Los Angeles, CA
... SOC Verification using System Verilog SRM Institute Of Science and Technology, Chennai, India (First Class with Distinction) May 2018 Bachelor Of technology in Electronics and Communication Engineering (ECE), CGPA: 9.51/10 SKILLS Programming skills: ... - 2020 Oct 22
... SOC Verification using System Verilog SRM Institute Of Science and Technology, Chennai, India (First Class with Distinction) May 2018 Bachelor Of technology in Electronics and Communication Engineering (ECE), CGPA: 9.51/10 SKILLS Programming skills: ... - 2020 Oct 22
Web Developer Engineering
Los Angeles, CA
... Bachelor of Arts in Computer Engineering Graduated June 2019 GPA: Top 25% of Engineering Coursework: Python, C, C++, Swift, Verilog, Rust, Labview, MATLAB, Embedded/Digital/Operating Systems, Circuits Experience Railsbank London, UK Web Developer ... - 2020 Oct 06
... Bachelor of Arts in Computer Engineering Graduated June 2019 GPA: Top 25% of Engineering Coursework: Python, C, C++, Swift, Verilog, Rust, Labview, MATLAB, Embedded/Digital/Operating Systems, Circuits Experience Railsbank London, UK Web Developer ... - 2020 Oct 06
Software Developer
Santa Ana, CA
... & SOFTWARE ● Bash (Shell and Scripting), Javascript, PHP, Python, ML, LISP, Prolog, C, C++, Java, Matlab, GNU Octave, Verilog, VHDL ● IntelliJ, Emacs, JUnit, Javadocs, JDB Debugger, GNU GDB Debugger, GNU Gprof (Performance Analysis and Program ... - 2020 Oct 02
... & SOFTWARE ● Bash (Shell and Scripting), Javascript, PHP, Python, ML, LISP, Prolog, C, C++, Java, Matlab, GNU Octave, Verilog, VHDL ● IntelliJ, Emacs, JUnit, Javadocs, JDB Debugger, GNU GDB Debugger, GNU Gprof (Performance Analysis and Program ... - 2020 Oct 02
Electrical Engineer Design
Fullerton, CA
... SKILLS • Signal Processing MATLAB • PCB Circuit Design Altium Designer, Kicad • Microsoft Office • Electronic Circuit Analysis PSPICE, Proteus • Robot Operating System (ROS) • Microcontroller AVR, ARM • FPGA Verilog • AutoCAD • SolidWorks • Fusion • ... - 2020 Sep 15
... SKILLS • Signal Processing MATLAB • PCB Circuit Design Altium Designer, Kicad • Microsoft Office • Electronic Circuit Analysis PSPICE, Proteus • Robot Operating System (ROS) • Microcontroller AVR, ARM • FPGA Verilog • AutoCAD • SolidWorks • Fusion • ... - 2020 Sep 15
Computer Engineering Student
Sun Valley, CA
... C, Java, Python, JavaScript, Verilog, HTML, MATLAB, SQL, Git, OpenCV, I2C, SPI, UART Software: Microsoft Office, GitHub, ModelSim, Quartus, Visual Studio, Linux OS, Autodesk Inventor, Eclipse, VS Code Lab: Multimeter, Oscilloscope, Wave Generator, ... - 2020 Aug 31
... C, Java, Python, JavaScript, Verilog, HTML, MATLAB, SQL, Git, OpenCV, I2C, SPI, UART Software: Microsoft Office, GitHub, ModelSim, Quartus, Visual Studio, Linux OS, Autodesk Inventor, Eclipse, VS Code Lab: Multimeter, Oscilloscope, Wave Generator, ... - 2020 Aug 31
Engineer Design
Santa Ana, CA
... Languages: Unix, Verilog, VHDL, JTAG,and (modified, but not proficient in C/C++). Experience Project Engineer II • Panasonic Avionics Corporation • December 2, 2002 – April 18, 2020 (Contracted from June 2002 to November 2002) Responsible for the ... - 2020 Aug 10
... Languages: Unix, Verilog, VHDL, JTAG,and (modified, but not proficient in C/C++). Experience Project Engineer II • Panasonic Avionics Corporation • December 2, 2002 – April 18, 2020 (Contracted from June 2002 to November 2002) Responsible for the ... - 2020 Aug 10
Electrical Engineer Design
Los Angeles, CA
... Chicago, IL Aug 2016 - May 2018 • Master of Science Electrical Engineering (M.S.E.E.) Major GPA 3.8 Majored in VLSI and Microelectronics with a focus on CMOS circuit design, FPGA, SoC and RTL development along with dataflow modelling in Verilog. ... - 2020 Aug 10
... Chicago, IL Aug 2016 - May 2018 • Master of Science Electrical Engineering (M.S.E.E.) Major GPA 3.8 Majored in VLSI and Microelectronics with a focus on CMOS circuit design, FPGA, SoC and RTL development along with dataflow modelling in Verilog. ... - 2020 Aug 10
Engineering Manager or Director, Project and/or Program Management
Buena Park, CA
... Synergy / Change, Oracle / Agile, Hyperion, Concur, Confluence, Orcad, Verilog, Synopsys, expired security clearance PATENTS An Integrated Video and Audio Signal Distribution System and Method for Use on Commercial Aircraft and Other Vehicles. ... - 2020 Jul 27
... Synergy / Change, Oracle / Agile, Hyperion, Concur, Confluence, Orcad, Verilog, Synopsys, expired security clearance PATENTS An Integrated Video and Audio Signal Distribution System and Method for Use on Commercial Aircraft and Other Vehicles. ... - 2020 Jul 27