Engineer Design

James Nachazel

**********@***.*** 951-***-**** 1143 Charleston St., Costa Mesa, CA 92626

Summary

** ***** ** ********** ********* test systems for the avionics industry. My goal is to obtain a challenging position, performing the analysis, planning, development, and testing hardware and software.This includes writing procedures and creating drawings. Skills

Designed: LSI Logic ASIC, Xilinx FPGA, A/D, D/A, CCD, Power Supplies, Fiber Optic, MC68040, PIC, and RISC. Communication: I2C, RS-232, RS-485,RS-422, RS-170, RS-343, and MIL-STD-1553. Standards: AC 43.13, EN4165, ARINC, PXI, EMI, IPC, ANSI, CE, and UL. Schematic Capture: Mentor Graphics, Cadence, OrCAD, and Eagle. Tools: Agile, Oracle, Visio, NI, WBS, MS Project, MS Office Word and Excel. Languages: Unix, Verilog, VHDL, JTAG,and (modified, but not proficient in C/C++). Experience

Project Engineer II • Panasonic Avionics Corporation • December 2, 2002 – April 18, 2020 (Contracted from June 2002 to November 2002)

Responsible for the design, development, planning, scheduling, maintaining, repair, and production of 5 different testers using PXI NI hardware including the Seat Tester. Reviewed the wiring of every seat for test ability. Entered every seat configuration into a program which generated test software, and designed new test cables as required. Designed Ethernet 4 wire - 2 wire convertor. Designed ECU simulator with RS-485 and Digital interfaces. Designed many interface cables for testing, 10 GIgabit Ethernet, Fiber, USB, RS-232, AC, and DC power. Reviewed system requirements and defined hardware specifications for testing. Performed training for all testers at the seat vendors and repair shops. Wrote Test Manuals, and QOP's.Certified testers to CE. Assisted with troubleshooting field issues.

Design Engineer • JMAR Semiconductor • May 1999 – June 2002 Number 2 engineer in the start up company. Front end Design of ASIC's for FIFO memory and Ethernet Controller using Synopsys Tools. Setup and maintained Solaris 7 / NT Network, including CAE tools. Program Manager/Design Engineer • Mykotronics, Inc. Torrance, CA • September 1995 – MAY 1999 Managed BU to develop Secure Hard Drive using PCMCIA, S-BUS, PCI, and ISA cards. Grow BU from $0.5M to $4.5M in annual programs.

Loral (Ford Aerospace) Corp. • Newport Beach, CA • Responsible Engineer • April 1987 – September 1995 Design and development of AIM-9R Seeker Electronics, and F18 FLIR POD from concept through production. Designed ASIC's, Flex circuits, and 8 layer circuit boards. Designs included High speed termination of transmition lines McDonnell Douglas Astronautics. • Huntington Beach, CA • Electrical Design Engineer • January 1985 – April 1987 Designed video Generator 25MHz for RS-343 and RS-170 and phase locked loop for testing MMS and F/A-18 FLIR POD. Education

BSEE • 1980-1984 • Northeastern University, Boston, MA • Minor in Computer Science, GPA3.0. Training

UC Irvine: Program Management Certification, Bottom-line Management, Cost Account Management, Writing Winning Proposals, Failure Mode and Effects Analysis, and Statistical Process Control.

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