| Resume alert | Resumes 11 - 20 of 191 |
FPGA/DSP engineer
San Gabriel, CA, 91776
... Math Software : Octave, MATLAB, MATHCAD Version Control Software : ClearCase, CVS, GIT Language : C, C++, Assemblies, Verilog, VHDL Tools : Audio/Speech DSP, IMX8 Yocto, NXP LSDK, OMAP OpenWRT, Android Stagefright frameworks/AOSP, OpenMAX media ... - 2022 Dec 06
... Math Software : Octave, MATLAB, MATHCAD Version Control Software : ClearCase, CVS, GIT Language : C, C++, Assemblies, Verilog, VHDL Tools : Audio/Speech DSP, IMX8 Yocto, NXP LSDK, OMAP OpenWRT, Android Stagefright frameworks/AOSP, OpenMAX media ... - 2022 Dec 06
Java, C++, Python, SQL, MySQL, Database design
Long Beach, CA
... TECHNICAL SKILLS ● Programming: Java, C++, C#, Python, C, SQL, Haskell, Verilog ● Frameworks: Unity Game Engine, Linux OS, Java Persistence API, Microsoft Office ● Bilingual: English, Armenian - 2022 Jul 03
... TECHNICAL SKILLS ● Programming: Java, C++, C#, Python, C, SQL, Haskell, Verilog ● Frameworks: Unity Game Engine, Linux OS, Java Persistence API, Microsoft Office ● Bilingual: English, Armenian - 2022 Jul 03
Engineer Electrical
Los Angeles, CA
... State Polytechnic University, Pomona Related Coursework Completed: Graduate Level: Microwave Engineering, Computer Architecture, Advance Software Engineering, Undergraduate Level: Verilog/VHDL, Wireless Communication, Object-Oriented Programming. ... - 2021 Apr 20
... State Polytechnic University, Pomona Related Coursework Completed: Graduate Level: Microwave Engineering, Computer Architecture, Advance Software Engineering, Undergraduate Level: Verilog/VHDL, Wireless Communication, Object-Oriented Programming. ... - 2021 Apr 20
Assistant Engineering
Long Beach, CA
... – 2016 TOOLS AND SKILLS Software Languages / Tools C, C++, MATLAB, Python, Verilog, VHDL, TCL PSpice, PROTEL (Altium Designer), EAGLE, Allergro, OrCAD, Power PCB, Xilinx Vivado, Altera Quartus II, ADA, Simulink, Multisim, MS word, Excel, PowerPoint. ... - 2021 Mar 26
... – 2016 TOOLS AND SKILLS Software Languages / Tools C, C++, MATLAB, Python, Verilog, VHDL, TCL PSpice, PROTEL (Altium Designer), EAGLE, Allergro, OrCAD, Power PCB, Xilinx Vivado, Altera Quartus II, ADA, Simulink, Multisim, MS word, Excel, PowerPoint. ... - 2021 Mar 26
Engineering Software
Rosemead, CA
... UNIVERSITY, POMONA GPA: 3.06 SKILLS Coding Languages: Html5, CSS, Javascript, C++, C#, Verilog, System Verilog, VBA, Python, and Java Technic Skills: Solidworks, Soldering, Pspice, Calipers, Oscilloscope, Technic Support and Digital Multimeter. ... - 2021 Mar 20
... UNIVERSITY, POMONA GPA: 3.06 SKILLS Coding Languages: Html5, CSS, Javascript, C++, C#, Verilog, System Verilog, VBA, Python, and Java Technic Skills: Solidworks, Soldering, Pspice, Calipers, Oscilloscope, Technic Support and Digital Multimeter. ... - 2021 Mar 20
Electrical Engineering
Brea, CA
... Cal Poly Pomona 2017 – Present • In Progress to Obtain a BS in Electrical Engineering • GPA: 3.78 SKILLS • C, C#, Assembly, Verilog • MATLAB, Simulink • Eagle, ltspice, OrCad, • Oscilloscope, Spectrum Analyzer, Function Generators, Basic Electronics ... - 2021 Feb 26
... Cal Poly Pomona 2017 – Present • In Progress to Obtain a BS in Electrical Engineering • GPA: 3.78 SKILLS • C, C#, Assembly, Verilog • MATLAB, Simulink • Eagle, ltspice, OrCad, • Oscilloscope, Spectrum Analyzer, Function Generators, Basic Electronics ... - 2021 Feb 26
Engineer Engineering
Cerritos, CA
... on seven segment display based on inputted number values from a universal remote - Implemented 4 bit adder RTL design in Verilog for FPGA - Used Control S, I2C and SPI protocols to determine the Digital Codes of the Remote to use in Verilog - Used ... - 2021 Feb 21
... on seven segment display based on inputted number values from a universal remote - Implemented 4 bit adder RTL design in Verilog for FPGA - Used Control S, I2C and SPI protocols to determine the Digital Codes of the Remote to use in Verilog - Used ... - 2021 Feb 21
Forensic Engineering Technician, Veteran: U.S. Army Airborne Infantry
Northridge, CA, 91324
... com/in/jordan-mumper-509a7513a/ PROFICIENCIES Languages: • Python (certification in progress), C++, LaTeX, Assembly, Verilog & SystemVerilog Technologies: • AutoCad, SOLIDWORKS, OrCAD, Cadence PSpice, Advanced Design Systems (ADS), Altair Feko, ... - 2021 Jan 04
... com/in/jordan-mumper-509a7513a/ PROFICIENCIES Languages: • Python (certification in progress), C++, LaTeX, Assembly, Verilog & SystemVerilog Technologies: • AutoCad, SOLIDWORKS, OrCAD, Cadence PSpice, Advanced Design Systems (ADS), Altair Feko, ... - 2021 Jan 04
Electrical and computer engineering
Los Angeles, CA
... in Electrical Engineering GPA: 3.95/4.00 Skills Tools: Cadence virtuoso, Multisim, Altium Designer, Eclipse, STM32CUBEMX, Vscode, Visual studio, Modelsim, Vivado Programming Languages: C/C++/Embedded C, UVM, Verilog/SystemVerilog, MATLAB, Html/CSS, ... - 2020 Dec 18
... in Electrical Engineering GPA: 3.95/4.00 Skills Tools: Cadence virtuoso, Multisim, Altium Designer, Eclipse, STM32CUBEMX, Vscode, Visual studio, Modelsim, Vivado Programming Languages: C/C++/Embedded C, UVM, Verilog/SystemVerilog, MATLAB, Html/CSS, ... - 2020 Dec 18
Engineer Software
Lakewood, CA
... • FPGA development: Writing the software to build a ping-pong score monitor using “Lattice” semi-conductor FPGA chip and VeriLog. • C++ game development: Developing highly cohesive modules with minimal coupling using Design Patterns to build a video ... - 2020 Nov 16
... • FPGA development: Writing the software to build a ping-pong score monitor using “Lattice” semi-conductor FPGA chip and VeriLog. • C++ game development: Developing highly cohesive modules with minimal coupling using Design Patterns to build a video ... - 2020 Nov 16