DONALD L. COX, JR

**** ****** **** *****, ******, CA

909-***-**** adlubj@r.postjobfree.com

adlubj@r.postjobfree.com

Objective:

To obtain Employment as an Electronic Engineer

Education:

Currently in Graduate Engineering School one class short of a Master’s of Science in Electrical and Computer Engineering, January 2015 to Present

California State Polytechnic University, Pomona

Received a PhD fellowship and attended a year of Graduate Engineering School

September 2004 to June 2005

University of California, Santa Barbara

Bachelor of Science Degree in Electrical Engineering, June 2004

Emphasis in Communication and Mixed Signal Applications, Major GPA of 3.67

California State Polytechnic University, Pomona

Related Coursework Completed:

Graduate Level: Microwave Engineering, Computer Architecture, Advance Software Engineering, Undergraduate Level: Verilog/VHDL, Wireless Communication, Object-Oriented Programming.

Technical Skills

Skilled in using C/C++, Python, Assembly language, LabView, Matlab, VHDL/Verilog, Xilinx Platform Studio and Embedded Design Kit, OrCAD PCB Designer, Microwave Office

Proficient in the use of Oscilloscopes, Spectrum Analyzers, Network Analyzers, and Logic Analyzers, In Circuit Tester and Flying Probe Tester with Boundary Scan Testing

Employment

Shipping and Receiving; Flexport Corporation, Compton CA

July 2020 to Present

Receive container’s from Port of Los Angeles and unload and prepare to be shipped to multiple locations across the Country

Master’s Project; California State Polytechnic University, Pomona, CA

June 2016 to Present

Working with my own Xilinx Spartan FPGA with a Microblaze embedded processor to complete my Master’s Project which is using sensors to detect when commercials play on Television programs and mute the volume accordingly and unmute when the television program comes back on

Electronics Hardware Engineer; QSC Corporation, Costa Mesa, CA

May 2015 to October 2015

Developed VHDL code to monitor thermal sensors for 2500 and 5000 watt amplifiers

Wrote VHDL code to use a Spartan FPGA to be a SPI interface between Digital/Analog Converters and Digital Signal Processor

Contributed to the development of the Touch Mix 24 Mixing board

Did qualifying test for K-series pre-amplifier

Electronics Test Engineer; Qual-Pro Corporation, Gardena, CA

February 2010 to April 2012

Developed test procedures and designed test jigs for various electronic assemblies

Wrote automated test programs to test actuators, relays and sensors in LabView

Trained technicians to run test programs and documented testing procedures

Troubleshooted avionic assemblies down to the component level

Lead engineering meetings to increase the quality yield of the manufacturing process

Avionics Engineer; Space Exploration Technologies (SpaceX), Hawthorne, CA

December 2008 to Feburary2009

Design test software in C for Xilinx Virtex 4 Embedded processor (power pc) for Engine Controller

Created PCB layouts using OrCAD Spectre PCB Design flow

Design and programmed automated LabView test beds for various Engine Controller Modules (thermo couple, fuel trim valve driver, vector thrust control, actuators, etc.)

Programmed test bench in VHDL to run simulation metrics on the FPGA code

Wild land Fire-Fighter; Cal Fire, Julian, CA (non-engineering related)

January 2007 to July 2008

Contain forest fires and did forest conservation work while residing at a Conservation Camp

Mixed Signal Design Intern, Berkeley Wireless Research Center, University of California at Berkeley, CA

June 2004 to September 2004

Designed and Implemented a Finite Impulse Response Filter using Matlab Simulink and Verilog, on a Virtex 2 FPGA to improve the speed of Sigma-Delta analog to digital converters.

Senior Project

September 2003 to June 2004

Completed a project sponsored by NASA/JPL to design an image processing and wireless communication system for a prototype Mars Rover.

Optics Engineering Intern, Jet Propulsion Laboratory; Pasadena, CA

June 2003 to September 2003

Designed a method to analyze how well various deformable mirrors correct for optical errors caused by a Telescope’s Active Control System and Primary mirror Design by programming test bench simulations in C++

Telecommunication Technician; Westel Voice & Data, Los Angeles, CA

January 1997 to January 2001

Installed and programmed Business Phone Systems and Voicemail Processing Systems

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