| Resume alert | Resumes 31 - 40 of 239 |
audio engineer
Norwalk, CA
... recording and synthesis equipment Employment History Audio Video Management Solutions Audio Technician 2018-present Currently employed with AVMS setting up and monitoring audio for business conventions, weddings, band performances and seminars. ... - 2020 Dec 04
... recording and synthesis equipment Employment History Audio Video Management Solutions Audio Technician 2018-present Currently employed with AVMS setting up and monitoring audio for business conventions, weddings, band performances and seminars. ... - 2020 Dec 04
Student at University of Southern California
Los Angeles, CA
... VSD Physical Design Flow: Floor Planning, Placement and Route, STA, clock tree Synthesis, DRC 2. SOC Verification using System Verilog SRM Institute Of Science and Technology, Chennai, India (First Class with Distinction) May 2018 Bachelor Of ... - 2020 Oct 22
... VSD Physical Design Flow: Floor Planning, Placement and Route, STA, clock tree Synthesis, DRC 2. SOC Verification using System Verilog SRM Institute Of Science and Technology, Chennai, India (First Class with Distinction) May 2018 Bachelor Of ... - 2020 Oct 22
Manager Plant
Los Angeles, CA
... Vienna: In contract with Christian Doppler Laboratories, taught a Masters level course in “Preparative Organic Chemical Synthesis” 1993 - 1996 Experience OEKOPHARM - PANMOL CORPORATION, Unternberg, Austria (Business/Marketing Development Branch of ... - 2020 Oct 18
... Vienna: In contract with Christian Doppler Laboratories, taught a Masters level course in “Preparative Organic Chemical Synthesis” 1993 - 1996 Experience OEKOPHARM - PANMOL CORPORATION, Unternberg, Austria (Business/Marketing Development Branch of ... - 2020 Oct 18
Software Developer
Santa Ana, CA
... Control and Datapath Partitioning Paradigm SOFTWARE ● Logisim (GUI Logic Module Design), Verilog (Simulation and FPGA HDL Synthesis) TECHNICAL BREADTH: ELECTRICAL ENGINEERING ELECTRONIC ANALOG CIRCUITS & ELECTROMAGNETICS ● Kirchoff’s Current and ... - 2020 Oct 02
... Control and Datapath Partitioning Paradigm SOFTWARE ● Logisim (GUI Logic Module Design), Verilog (Simulation and FPGA HDL Synthesis) TECHNICAL BREADTH: ELECTRICAL ENGINEERING ELECTRONIC ANALOG CIRCUITS & ELECTROMAGNETICS ● Kirchoff’s Current and ... - 2020 Oct 02
Design Manager
Los Angeles, CA
... Led the data synthesis and sense-making analysis through qualitative coding and affinity diagramming. Helped design storyboards, information architecture, journey maps and wireframes. education MS in Human-Computer Interaction + Design UNIVERSITY OF ... - 2020 Jul 29
... Led the data synthesis and sense-making analysis through qualitative coding and affinity diagramming. Helped design storyboards, information architecture, journey maps and wireframes. education MS in Human-Computer Interaction + Design UNIVERSITY OF ... - 2020 Jul 29
Assistant Safety
Aliso Viejo, CA
Bernardo Guerrero Irvine, California adexb8@r.postjobfree.com SKILLS ●Synthesis, fabricate, and/or assemble polymeric materials ●Various analytical procedures ●Highly engaged in lab productivity and efficiency ●Offer suggestions to improve general ... - 2020 Jul 28
Bernardo Guerrero Irvine, California adexb8@r.postjobfree.com SKILLS ●Synthesis, fabricate, and/or assemble polymeric materials ●Various analytical procedures ●Highly engaged in lab productivity and efficiency ●Offer suggestions to improve general ... - 2020 Jul 28
Design Engineer Engineering
Los Angeles, CA
... • Block or Chip Level Floor planning, Bus / Pin Planning, Clock Tree Synthesis, Placement, Optimization, Routing, Parasitic Extraction, Static Timing Analysis, IR drop analysis, Physical Verification and Sign Off. • Developed RTL module in System ... - 2020 Jul 13
... • Block or Chip Level Floor planning, Bus / Pin Planning, Clock Tree Synthesis, Placement, Optimization, Routing, Parasitic Extraction, Static Timing Analysis, IR drop analysis, Physical Verification and Sign Off. • Developed RTL module in System ... - 2020 Jul 13
Chemistry Teacher
Fullerton, CA, 92833
... chemistry synthesis: chemistry prep. – Pipetting, TLC, (2 (years) 2 years)Column Centrifuge, – - Similar GC Chromatography, MS, Gel to HPLC, Organic Electrophoresis, pH synthesis Meter, extraction, Titration DNA Rotary Extraction Evaporator, FT-IR, ... - 2020 Apr 29
... chemistry synthesis: chemistry prep. – Pipetting, TLC, (2 (years) 2 years)Column Centrifuge, – - Similar GC Chromatography, MS, Gel to HPLC, Organic Electrophoresis, pH synthesis Meter, extraction, Titration DNA Rotary Extraction Evaporator, FT-IR, ... - 2020 Apr 29
QA engineer
Irvine, CA
... - Engineering mathematics, Digital system design, Microcomputer system design (PIC16F886, PIC24F FAMILY), Advanced digital system design, Robotics, Digital system synthesis and optimization, Risk management, High-performance computer architecture. ... - 2020 Feb 19
... - Engineering mathematics, Digital system design, Microcomputer system design (PIC16F886, PIC24F FAMILY), Advanced digital system design, Robotics, Digital system synthesis and optimization, Risk management, High-performance computer architecture. ... - 2020 Feb 19
Chemical Engineering Engineer
Baldwin Park, CA, 91706
... Ammonia Synthesis Plant Design February 2019 – May 2019 Worked in a team of five to simulate a CF Braun ammonia synthesis process using process simulation software • Optimized CO2 removal by utilizing various software to accurately simulate amine ... - 2020 Feb 15
... Ammonia Synthesis Plant Design February 2019 – May 2019 Worked in a team of five to simulate a CF Braun ammonia synthesis process using process simulation software • Optimized CO2 removal by utilizing various software to accurately simulate amine ... - 2020 Feb 15