Chicago, IL
... Fabricated negative microchannel molds using a variety of techniques, including spin coating, photolithography and etching. Checked quality of negative molds using SEM. Optimized parameters of fabrication process to maximize the yield. Management ...
- 2017 Feb 20
Columbia, MO
Summary: Having worked in the Semiconductor industry since 2004, I have extensive experience in a cleanroom environment specializing in photolithography. Employment History: Equipment Technician Diodes Fabtech Semiconductor 2014-PRESESNT Responsible ...
- 2017 Feb 18
Chandler, AZ
... Studied photolithography and etch while in the role. Western Electric – 01/1980-07/1980 Process Engineer Worked as a process engineer doing process transfer from an existing facility. Established the prosuction line for this process and implemented ...
- 2017 Feb 12
Medford, MA
... Familiar with semiconductor processes, diagnostics, testing, and equipment, such as oxidation, & Equipment: diffusion, ion implantation, rapid thermal annealing, photolithography, film deposition (evaporation, sputtering, CVD), plasma dry etching; ...
- 2017 Feb 10
Mesa, AZ
... M/A COM-Lowell, Massachusetts 11/2000–9/2005 Lithography Engineer Developed and maintained photolithography processes to streamline the efficiency of the fabrication of Integrated Circuits (IC) using Steppers, Coaters/ Developers, SEM, Plasma ...
- 2017 Feb 01
Santa Clara, CA
... study Ski l ls & Abi l ities BIOMEDICAL DEVICE DESIGN Extensive experience in microfluidic device fabricat ion using photolithography and metal deposit ion techniques Implemented a sandwich immunoassay on microfluidic device for the measurement of ...
- 2017 Jan 31
... AFM, Cryostat, Hall Effect Measurement System • Nanometer sized device fabrication: Photolithography, E-beam lithography, Dry/Wet Etch Technique • Computer/Software: Microsoft Office, LaTeX, Origin, LabVIEW, CAD, and MATLAB PUBLICATIONS • T. ...
- 2017 Jan 28
Harrison, NJ
... Performed Photolithography and Photoresist Spin Coating on silicon wafers in a Clean Room lab. Surface measurements, Refractive Index calculations and Wafer thickness calculations performed on materials such as silicon, Al2O3 and silicon nitrate ...
- 2017 Jan 23
Santa Barbara, CA
... Photolithography and patterning: Layout design resist optimization and planarization contact, projection and stepper lithography wet/plasma etch (RIE, ICP) Nanostructuring Chemical Mechanical Planarization (CMP) Wire-Bonding Profilometry and Surface ...
- 2017 Jan 23
Burlington, VT
... Developed and qualified 2 and 3 micron CMOS processes related to metals, insulators, RIE and photolithography. Qualified facility, developed and implemented processes in 3 years. Certifications ISO 9000/2000, AS9100 & TS16949 Certified Quality ...
- 2017 Jan 19