| Resume alert | Resumes 41 - 50 of 5215 |
Design Engineer Circuit
Cupertino, CA
... Other projects included PCB design, some FPGA. 3/98-7/98: Avanti Corporation, Fremont, CA Applications Engineer, supported circuit simulation software (HSPICE and Star-Sim) and addressed customer questions about circuit simulation software. 6/97-2 ... - Mar 23
... Other projects included PCB design, some FPGA. 3/98-7/98: Avanti Corporation, Fremont, CA Applications Engineer, supported circuit simulation software (HSPICE and Star-Sim) and addressed customer questions about circuit simulation software. 6/97-2 ... - Mar 23
Embedded Software Engineer
Pittsburgh, PA
... (Cheswick PA) •Design and developed, in ‘C’ on a M68HC11E1 microcontroller, commands for a craft port interface for the TEC3100 Digital Board (The interface commands aided in the board level debugging of the FPGA and framer chips) •Maintained ... - Mar 23
... (Cheswick PA) •Design and developed, in ‘C’ on a M68HC11E1 microcontroller, commands for a craft port interface for the TEC3100 Digital Board (The interface commands aided in the board level debugging of the FPGA and framer chips) •Maintained ... - Mar 23
Palo Alto Firmware Engineer
Menlo Park, CA
Stefan Craciun 352-***-**** — ad4igz@r.postjobfree.com **** ******* ***., * **** Alto, CA 94303 Professional Skills Algorithm mapping to digital architecture on FPGA fabric Identifying computational parallelism in applications and accelerating ... - Mar 22
Stefan Craciun 352-***-**** — ad4igz@r.postjobfree.com **** ******* ***., * **** Alto, CA 94303 Professional Skills Algorithm mapping to digital architecture on FPGA fabric Identifying computational parallelism in applications and accelerating ... - Mar 22
Test Manager Web App
Tacoma, WA
... Hardware FPGA testing for custom circuit boards for the Coinstar machine. Monthly primary automation task includes writing technical function summaries and test plans in IEEE format. Responsibilities also include successfully integrating ... - Mar 21
... Hardware FPGA testing for custom circuit boards for the Coinstar machine. Monthly primary automation task includes writing technical function summaries and test plans in IEEE format. Responsibilities also include successfully integrating ... - Mar 21
Electrical Engineering Mixed Signal
Tempe, AZ
... ● Bitcoin Hashing using System Verilog (FPGA): The first part of the project was to implement an SHA-256 (Secure Hashing Algorithm) encoding algorithm using System Verilog. Given any input message, it would output a 256-bit encrypted message using ... - Mar 19
... ● Bitcoin Hashing using System Verilog (FPGA): The first part of the project was to implement an SHA-256 (Secure Hashing Algorithm) encoding algorithm using System Verilog. Given any input message, it would output a 256-bit encrypted message using ... - Mar 19
Software Development C C++
Harvard, MA, 01451
... The Optical Switch incorporates FPGA hardware used for traffic management. I worked on some defects to fix software when we had overflow problems with the FPGA. Analysis, design, and development of embedded Switching software in VxWorks environment. ... - Mar 19
... The Optical Switch incorporates FPGA hardware used for traffic management. I worked on some defects to fix software when we had overflow problems with the FPGA. Analysis, design, and development of embedded Switching software in VxWorks environment. ... - Mar 19
Test Tech Data Analytics
Tustin, CA
... Skills & Abilities SKILLS ·Experience with PLC software, Robotics, C++, Verilog, VHDL, Python, AutoCAD, MATLAB, Analog & Digital Electronic Circuit Analysis, Thermal Systems, Oscilloscope and Voltmeter use, FPGA, Arduino, Raspberry Pi, Computer ... - Mar 17
... Skills & Abilities SKILLS ·Experience with PLC software, Robotics, C++, Verilog, VHDL, Python, AutoCAD, MATLAB, Analog & Digital Electronic Circuit Analysis, Thermal Systems, Oscilloscope and Voltmeter use, FPGA, Arduino, Raspberry Pi, Computer ... - Mar 17
Senior Staff Engineer
Fremont, CA
... Ayar Labs July 2022-Sept 2023 Senior Staff Engineer Validation and testing of opto-electronic chips, porting of an FPGA design from one architecture to another (and learning what and FPGA is, plus Verilog). Managing data for receiver end of the chip ... - Mar 16
... Ayar Labs July 2022-Sept 2023 Senior Staff Engineer Validation and testing of opto-electronic chips, porting of an FPGA design from one architecture to another (and learning what and FPGA is, plus Verilog). Managing data for receiver end of the chip ... - Mar 16
C++ Software Developer
Sacramento, CA
... Improved overall timing, signal quality, and buss structure by reducing buss contention through the simplified circuits using FPGA technology and JTAG for scan diagnostic purposes. Developed automatic monitoring system in C. Included remote site ... - Mar 15
... Improved overall timing, signal quality, and buss structure by reducing buss contention through the simplified circuits using FPGA technology and JTAG for scan diagnostic purposes. Developed automatic monitoring system in C. Included remote site ... - Mar 15
Software Engineer .Net Core
Oceanside, CA
... Integrator of FPGA/arm64 MpSOCs embedded Linux Software Defined Radio APIs and arm SOCs in Surface Duo phablet. Builder of UEFI and Embedded OSes (x86 and arm32) for enterprise LaserJet printers and UEFI for an embedded Medical appliance. ... - Mar 14
... Integrator of FPGA/arm64 MpSOCs embedded Linux Software Defined Radio APIs and arm SOCs in Surface Duo phablet. Builder of UEFI and Embedded OSes (x86 and arm32) for enterprise LaserJet printers and UEFI for an embedded Medical appliance. ... - Mar 14