Post Job Free
Sign in

C++ Software Developer

Location:
Sacramento, CA
Posted:
March 15, 2024

Contact this candidate

Resume:

Jose R. Carnero 747-***-**** *********@*****.***

EDUCATION

San Jose State University San Jose, CA. B.S. Computer Science Mission College Santa Clara, CA. AS Electronics

TECHNICAL SKILLS

Languages and Scripts: Object Oriented Programming (OOP) C++/C, Visual Studio 5 & 6, .NET, Visual Basic, Java, Assembly, PVM, PHP, Javascript. CPUs: RISC R10000, Motorola imbedded 860, 360, 68000, Intel 8086, AMD 2900 OS: UNIX, Windows, WinNT, Linux

Tools: Netbeans, Visual Basic, Visual C++, Excel, IG-XL, HTML, SQL, Power Point, Word, Matlab, SmartDraw, sh, csh, Gould.

Network Protocol: TCP/IP, FTP, RS232, I2C

PROFESSIONAL EXPERIENCE

I’m presently retired but I’m willing to go back to work ASAP. Software Developer. Palazos. Hayward, CA. USA. 01/2009 to 11/2010

Involved in web application design.

Developed business to business (B2B) and customer to business (C2B) sentiment programs utilizing a master to slaves Software (SW) algorithm in PHP resulting in improving the execution of searches. SW Developer. DoubleKnot Inc. Los Gatos, CA 03/2008 - 11/2008

Involved in web application design.

Developed Win32 Applications using OOP Dev Studio 5 /C++ under VISTA. Completed MyPublisher Application Client/Server Implementation using MyPublisher as a native client WIN32 application which creates books, photo books, cards, calendars, etc.

Involved on the Planning of the next product revision. SW Developer/Project Manager. CGE LLC. Los Gatos CA 03/2008-05/2005

Involved in property investment and property management company

Developed Software (SW) tools for financial bookkeeping in C/C++, VB, and Java

Developed SW Estimators for Real State Projects

Results included an efficient delivery on time, even with traveling, of financial forecasts, real state investments and key projects.

Manage each real state project as to assure that the appropriate resources are in place and to create contingency plans proactively.

SW Developer and SW Manager. Credence System Corp.San Jose, CA. 04/2005 – 04/2000

Developed Memory and Mix Signal ATE.

Developed Pin Electronics instrument driver for the VATE and Diamond platform. Results included the on time delivery of the first cross-platform device driver compiled under .NET C++/Win32 and Linux Red Hat. The testing consisted on unit testing, then functional testing in integration, and reliability through rigorous calibration, verification, and characterization of the digital, analog, and power subsystems.

Designed, developed, tested, and shipped MFC based GUI applications: wafer sort, device testing, and QA retest. This resulted in the complete support of a set of analog and digital instruments device drivers from one master application. 1 of 3

Jose R. Carnero 747-***-**** *********@*****.***

Supported legacy and new VATE C++/ C code on Windows/Linux, OOP, and C++ for ASL ATE testers. Manage a group of SW engineers to design and maintain new Visual ATE projects. Results included new VATE MFC based GUI and reduced the list of bugs by at least 20%. Participated on design meeting to assist group with ideas, improvements, and documentation. Trained SW engineers in C, C++, MFC, and Windows OS, word, excel, and VATE. SW Developer Teradyne MTD San Jose, CA 04/2000 – 02/1997

Developed DRAM, SRAM, and Flash memory testers for the semiconductor industry

Wrote Runtime device drivers for end-user applications in C++ - OOP. Developed software paradigms/algorithms for runtime, Calibration, Verification, Characterization and diagnostic device drivers.

Developed AC Calibration code for the pin-electronics digital data and DC Calibration code for the device power supplies in C++ and Visual Basic OOP. This included extensive failure analysis on the pipeline subsystem which it had many levels in depth. Failure analysis included the verification and characterization using sophisticated calibration techniques such as piece-wise or linear calibration methods to insure that the digital data, analog, and power subsystem are functionally reliable.

Wrote Design Concept documents for the flash 750 Memory Tester. Overall tester knowledge – Pin electronics, Robotics, Memory, and Power Distribution. SW Diagnostic Engineer Diba Inc. Menlo Park, CA. 01/1996 – 01/1997

Developed SW for the information appliance Internet, PC, TV, and Telephone appliances.

Designed C diagnostics user interface and test functions for each section of the embedded Daunltess 860 CPU using PSOS operating system. Results included: full test coverage of the HW including modem and internet proven functionality through black-box and white-box test methods. SW/Hardware (HW) Engineer. Pyramid Tech. Corp. San Jose, CA 05/1989 – 12/1996

Manufactures a broad range of Unix Open System Products from which many database applications are supported on symmetrical multi parallel processing with shared and distributed memory respectively.

Implemented automatic PCB sorter and multi-board stress applications in C for the Nile Symmetrical Multi Processing (SMP-RISC R4000) test. Improved test coverage, reduced manual intervention, increased production yields, and reduced overall test cost. Salvage of RISC-R4000 CPUs of approximately $1.75M of product inventory. Ported test tools to new products

Spearheaded a team of engineers to analyze major design deficiencies in RISC CPU subsystems. Improved overall timing, signal quality, and buss structure by reducing buss contention through the simplified circuits using FPGA technology and JTAG for scan diagnostic purposes.

Developed automatic monitoring system in C. Included remote site system test (350 UNIX systems), power and frequency margining. Improved production yield by substantial savings of 30% in test cycles. Increased Server CPU production by 25%. Improved system reliability by implementing black-box type testing.

SW/Firmware Engineer. Sharebase Los Gatos, CA 05/1981 – 04/1989

developed SW/HW for SQL Relational Database Machines (RDBM).

Developed the disk I/O device driver for the Intelligent Database Machine (IDM)’s UNIX kernel to support the FTB feature and Developed Full Track Buffering (FTB) firmware for disk I/O controllers written in Microcode firmware for the 2901 bit Slice. Increased I/O raw performance throughput to 800%, and overall performance increase of 250%

Developed ECL Base CPU diagnostics using a Unix CPU simulator. Resulted in substantial saving during the HW bring up since SW code was proven to work under simulation. 2 of 3

Jose R. Carnero 747-***-**** *********@*****.***

Developed Disk Drive diagnostics in C. Aided in the findings of functional problems in system development and production areas. Developed and implemented automated format/diagnostic utilities for disk drivers. Resulted in a production increase of 100%. 3 of 3



Contact this candidate