Is it your resume?
ASIC UVM Verification Engineer resume in San Jose, CA - November 2026
Karthik Nalaparaju
************@*****.*** / 785-***-****
Professional Summary:
ASIC Design Verification Engineer with 8 years of experience in verifying ASIC/SoC designs using SystemVerilog and UVM. Experienced in developing and maintaining testbenches, writing directed and...
If it is your resume and you want to update or delete it - please enter your email: