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ASIC SoC Design Verification Engineer resume in Richardson, TX - September 2026
Harish Sekar
**********@*****.*** 469-***-****
SUMMARY
Design Verification Engineer with 5+ years of experience in ASIC/SoC functional verification and Verification IP (VIP) development. Strong expertise in SystemVerilog and UVM, with a track record of architecting scalable testbenches for...
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