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Digital Design and Verification - ASIC, Verilog, SystemVerilog, UVM resume in Chesterfield, MO - May 2020

MOHAMMED POTA

***** ********* **, ************, ** 63017 E-mail: adc9aw@r.postjobfree.com Ph: 585-***-**** linkedin.com/in/mohammedpota Objective: Actively looking for fulltime opportunities in Digital Design and Verification starting July 2020. Academic Qualifications:

• Rochester Institute of...


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