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Engineer Design resume in India - March 2019
Vasvi Patel
Banglore, India ac8pam@r.postjobfree.com
DOB : 30/10/1990 +91-903**-*****
SKILLS
Verilog, System Verilog, Basics of UVM, Perl, Multisim, MATLAB, Xilinx, Basic C Programming EDUCATION
M.E
(Electronics and Communication)
Gujarat Technological
University
Hasmukh...
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