| Resume alert | Resumes 31 - 40 of 56 |
Certified Project
Pune, MH, India
... INTERESTS & ACTIVITIES Travelling Singing Playing Guitar PROJECTS Implementation of BOOTHS ALGORITHM using VHDL on FPGA board for faster binary multiplication. Implementation of the Traffic Signal Controlling based on IMAGE PROCESSING. PERSONAL ... - 2015 Aug 03
... INTERESTS & ACTIVITIES Travelling Singing Playing Guitar PROJECTS Implementation of BOOTHS ALGORITHM using VHDL on FPGA board for faster binary multiplication. Implementation of the Traffic Signal Controlling based on IMAGE PROCESSING. PERSONAL ... - 2015 Aug 03
Engineer Project
Pune, MH, India
... 3] Project name: To generate high frequency PWM channels with different characterstics using FPGA.(fourth year) Domain : VLSI + EMBEDDED Project Details : The main project intends to generate variable dutycycle and high frequency PWM signals for ... - 2015 Aug 01
... 3] Project name: To generate high frequency PWM channels with different characterstics using FPGA.(fourth year) Domain : VLSI + EMBEDDED Project Details : The main project intends to generate variable dutycycle and high frequency PWM signals for ... - 2015 Aug 01
Engineering Project
Pune, MH, India
... Languages : C, C++ Tools : Matlab, Xillinx Curriculum Projects: Engineering Project: Duration : 1 year Title : “FFT Implementation By FPGA Using VEDIC Mathematics” Technology : VLSI Description : FPGA is implemented using vedic algorithm. ... - 2015 Jun 27
... Languages : C, C++ Tools : Matlab, Xillinx Curriculum Projects: Engineering Project: Duration : 1 year Title : “FFT Implementation By FPGA Using VEDIC Mathematics” Technology : VLSI Description : FPGA is implemented using vedic algorithm. ... - 2015 Jun 27
Engineering Design
Pune, MH, India
... Short term course on digital design using HDL at CDAC HYDERABAD Basics on digital design using hdl and Verilog coding methodologies and test bench techniques, and some applications with FPGA kit. Board SPARTAN -3 PG-DIPLOMA in VLSI at CDAC PUNE ... - 2015 Jun 22
... Short term course on digital design using HDL at CDAC HYDERABAD Basics on digital design using hdl and Verilog coding methodologies and test bench techniques, and some applications with FPGA kit. Board SPARTAN -3 PG-DIPLOMA in VLSI at CDAC PUNE ... - 2015 Jun 22
Design Project
Pune, MH, India
... Joseph’s matriculation higher secondary school, 89% (2007) Projects “FPGA prototyping for vehicle trajectory display” using zed board. Project description: This project focuses on providing guidelines for the drivers during reverse parking. ... - 2015 Apr 13
... Joseph’s matriculation higher secondary school, 89% (2007) Projects “FPGA prototyping for vehicle trajectory display” using zed board. Project description: This project focuses on providing guidelines for the drivers during reverse parking. ... - 2015 Apr 13
VHDL, Verilog, c, c++, digital design
Pune, MH, India
... College, 2009-2013 69.2% University Jaipur, Rajasthan 12th Modern School, 2008-2009 79.7% CBSE Kota 10th CBSE Modern School, 2006-2007 72.5% Kota SOFTWARE SKILLS Operating Systems Windows, LINUX FPGA Vertex 4, Vertex 6 Xilinx, Questasim, Emacs, Kiel ... - 2015 Feb 20
... College, 2009-2013 69.2% University Jaipur, Rajasthan 12th Modern School, 2008-2009 79.7% CBSE Kota 10th CBSE Modern School, 2006-2007 72.5% Kota SOFTWARE SKILLS Operating Systems Windows, LINUX FPGA Vertex 4, Vertex 6 Xilinx, Questasim, Emacs, Kiel ... - 2015 Feb 20
Design Engineer
Pune, MH, India
... Summary of Qualifications: > Good understanding of the ASIC and FPGA design flow. > Experience in writing RTL models in Verilog, VHDL and Test benches in System Verilog. > Good knowledge in verification methodologies. > Experience in using industry ... - 2014 Dec 19
... Summary of Qualifications: > Good understanding of the ASIC and FPGA design flow. > Experience in writing RTL models in Verilog, VHDL and Test benches in System Verilog. > Good knowledge in verification methodologies. > Experience in using industry ... - 2014 Dec 19
Project Engineer
Pune, MH, India
... Technical Proficiency • Experience in VHDL, Verilog, Xilinx Spartan FPGA programming. • Expertise in Synthesis, Place & Route, Static Timing Analysis. • Proficiency in RTL design, MAT LAB, simulation and synthesis using Xilinx ISE tools. • Highly ... - 2014 Sep 21
... Technical Proficiency • Experience in VHDL, Verilog, Xilinx Spartan FPGA programming. • Expertise in Synthesis, Place & Route, Static Timing Analysis. • Proficiency in RTL design, MAT LAB, simulation and synthesis using Xilinx ISE tools. • Highly ... - 2014 Sep 21
b.tech (ece)
Pune, MH, India
... SKILLS Software/Hardware Languages C, Verilog Software Xilinx ISE, Cadance, Matlab,Keil,Zelio Soft Hardware Designing FPGA Operating System Windows XP,7,8 Documentation Tools MS Office Other Skills 8051 Microcontroller,PLC Certificate Course in ... - 2014 Sep 16
... SKILLS Software/Hardware Languages C, Verilog Software Xilinx ISE, Cadance, Matlab,Keil,Zelio Soft Hardware Designing FPGA Operating System Windows XP,7,8 Documentation Tools MS Office Other Skills 8051 Microcontroller,PLC Certificate Course in ... - 2014 Sep 16
Engineer Project
Pune, MH, India
... I have around 1.6+ years of experience in Embedded/VLSI domain in Dtech System where I work on embedded C, C++, Object oriented programming, fpga (Xilinx Spartan-3 XC3S200), arm7 (LPC 2148), RaspberryPi, begalebone, OpenCV, SimpleCV, Python, GCC, ... - 2014 Aug 19
... I have around 1.6+ years of experience in Embedded/VLSI domain in Dtech System where I work on embedded C, C++, Object oriented programming, fpga (Xilinx Spartan-3 XC3S200), arm7 (LPC 2148), RaspberryPi, begalebone, OpenCV, SimpleCV, Python, GCC, ... - 2014 Aug 19