| Distance: | Resume alert | Resumes 11 - 20 of 5995 |
Student at Virginia Tech, EE major
Blacksburg, VA
... physical activity and socialization Computer Skills Microsoft PowerPoint, Matlab, LTspice, Arduino, Solidworks, Quartus, Verilog Awards AP Scholar with Distinction Jul 2024 - Scored an average of at least 3.5 on all AP Exams and at least a 3 on all ... - Sep 09
... physical activity and socialization Computer Skills Microsoft PowerPoint, Matlab, LTspice, Arduino, Solidworks, Quartus, Verilog Awards AP Scholar with Distinction Jul 2024 - Scored an average of at least 3.5 on all AP Exams and at least a 3 on all ... - Sep 09
Java Developer Stack
Morrisville, NC
... in Computer Engineering TECHNICAL SKILLS: Languages: Java 8/11/17, J2EE, Python, C++, C#.NET, Embedded C, Verilog, SystemVerilog, VHDL Frontend: HTML5, CSS3, JavaScript, jQuery, Angular, ReactJS Backend & Frameworks: Spring Boot, Spring MVC, Spring ... - Sep 03
... in Computer Engineering TECHNICAL SKILLS: Languages: Java 8/11/17, J2EE, Python, C++, C#.NET, Embedded C, Verilog, SystemVerilog, VHDL Frontend: HTML5, CSS3, JavaScript, jQuery, Angular, ReactJS Backend & Frameworks: Spring Boot, Spring MVC, Spring ... - Sep 03
Project Manager Technical
Mukilteo, WA
... Richard Eyrish Mukilteo, WA 98275 ****.******@*****.*** 425-***-**** www.linkedin.com/in/richeyrish Page 4 Highlighted Skills Programming Language Experience: C++, JavaScript, Python, R, COBOL, MATLAB, Verilog MS Office Suite: Excel (Vlookups & ... - Aug 30
... Richard Eyrish Mukilteo, WA 98275 ****.******@*****.*** 425-***-**** www.linkedin.com/in/richeyrish Page 4 Highlighted Skills Programming Language Experience: C++, JavaScript, Python, R, COBOL, MATLAB, Verilog MS Office Suite: Excel (Vlookups & ... - Aug 30
Design Engineer Hardware
Colorado Springs, CO
... KEYSKILLS PCB Design & Layout Oversight: Cadence Allegro, Orcad, Mentor Pads FPGA/ASIC: VHDL, Verilog, SystemVerilog; Xilinx, Intel/Altera, Lattice High-Speed Interfaces: PCIe, Ethernet, USB, SAS/SATA, DDR2/3/4, I C, SPI Analog & Power: Power ... - Aug 29
... KEYSKILLS PCB Design & Layout Oversight: Cadence Allegro, Orcad, Mentor Pads FPGA/ASIC: VHDL, Verilog, SystemVerilog; Xilinx, Intel/Altera, Lattice High-Speed Interfaces: PCIe, Ethernet, USB, SAS/SATA, DDR2/3/4, I C, SPI Analog & Power: Power ... - Aug 29
C/C++
Quan Thu Duc, Vietnam
... Education Ho Chi Minh City University of Technology and Education 2022 – Present Major: Computer Engineering Technology • GPA: 3.29 / 4 Skills • Programming Languages: C/C++, Python, MATLAB, Verilog, HTML, CSS, Dart (basic), assembly • ... - Aug 29
... Education Ho Chi Minh City University of Technology and Education 2022 – Present Major: Computer Engineering Technology • GPA: 3.29 / 4 Skills • Programming Languages: C/C++, Python, MATLAB, Verilog, HTML, CSS, Dart (basic), assembly • ... - Aug 29
Ho Chi Minh
Quan Tan Binh, 72100, Vietnam
... game • Implement it using the BKIT ARM4 kit • My Role: Specify constraints and functionality, learn and perform labs, and bring sensor data to the screen ] Design and Implementation of an ALU using Verilog (on going) OverLeaf • Design Specifications. ... - Aug 26
... game • Implement it using the BKIT ARM4 kit • My Role: Specify constraints and functionality, learn and perform labs, and bring sensor data to the screen ] Design and Implementation of an ALU using Verilog (on going) OverLeaf • Design Specifications. ... - Aug 26
Validation Engineer Computer Engineering
Peoria, AZ
... and Communication Engineering Technical Skills ● Programming Languages: Python, MATLAB, Simulink, C, C++, Spice, LabVIEW, Verilog ● Tools : Vehicle Spy Emulator(vspy), Phoenix Utility, PuTTy, dSpace Control desk, CAN db++, EAGLE, CANalyzer, CPS Test ... - Aug 25
... and Communication Engineering Technical Skills ● Programming Languages: Python, MATLAB, Simulink, C, C++, Spice, LabVIEW, Verilog ● Tools : Vehicle Spy Emulator(vspy), Phoenix Utility, PuTTy, dSpace Control desk, CAN db++, EAGLE, CANalyzer, CPS Test ... - Aug 25
Test Engineer Master's
Los Angeles, CA
... Wireless Research Center - Berkeley, CA June 2004 to September 2004 Designed and Implemented a Finite Impulse Response Filter using Matlab Simulink and Verilog, on a Virtex 2 FPGA to improve the speed of Sigma-Delta analog to digital converters. ... - Aug 24
... Wireless Research Center - Berkeley, CA June 2004 to September 2004 Designed and Implemented a Finite Impulse Response Filter using Matlab Simulink and Verilog, on a Virtex 2 FPGA to improve the speed of Sigma-Delta analog to digital converters. ... - Aug 24
Computer/Software Engineer
Ames, IA
... SKILLS Programming Languages: Java, C, C#, Python, HTML, CSS, JavaScript, TypeScript, Verilog, VHDL, SQL, MIPS Assembly Technical Skills: Linux, React, Node.js, Express, Sequelize, JWT, REST APIs, Bootstrap, MongoDB, Spring Boot, Postman, Eclipse, ... - Aug 24
... SKILLS Programming Languages: Java, C, C#, Python, HTML, CSS, JavaScript, TypeScript, Verilog, VHDL, SQL, MIPS Assembly Technical Skills: Linux, React, Node.js, Express, Sequelize, JWT, REST APIs, Bootstrap, MongoDB, Spring Boot, Postman, Eclipse, ... - Aug 24
Software Engineer Development
Tucson, AZ
... including shared memory, semaphores, signals and message queues, GCC, GDB, Makefile, Bash, Python, Matlab RTL: VHDL, Verilog, Xilinx, Altera, Microsemi, Modelsim, Xilinx ISE & Vivado, Altera Quartus II RTL IPs for UART, SPI, SDLC, I2C, Flash ... - Aug 17
... including shared memory, semaphores, signals and message queues, GCC, GDB, Makefile, Bash, Python, Matlab RTL: VHDL, Verilog, Xilinx, Altera, Microsemi, Modelsim, Xilinx ISE & Vivado, Altera Quartus II RTL IPs for UART, SPI, SDLC, I2C, Flash ... - Aug 17