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Downtown San Jose, CA, 95113
... (diode, CMOS, Bipolar, FINFET), analog and RF circuits (current mirror, op-amp, bandgap, LDO, ADC, LNA, PLL, mixer, etc.) Proficiency in Cadence, Synopsys, MATLAB, Unix and Linux operation systems, Microsoft office, some Verilog and some C language. ...
- 2023 Feb 08
Hayward, CA
... TECHNICAL SKILLS Software MS Visio, Eclipse, Solid Works, Diagnostic Engineering Tool, CANoe, CANalyzer, CANape, MABX (dSpace), Trace32, SAE J1939 Protocol, Verilog, Cadence, Synopsys, FEBio, FEKO, Polarion, DV Tool, JIRA, MATLAB, Simulink, ...
- 2023 Jan 07
Pleasanton, CA, 94566
... Forecasting: Responsible for hosting and managing weekly regional forecast call cadence and ensuring forecast optics are current and accurate and provide a clear deal path to budget. Responsible for driving and managing opportunity hygiene & timely ...
- 2023 Jan 03
Fremont, CA
... languages and CAD tools proficiency Windows, Ubuntu, Visual C, Atmel IDE, MPLAB XIDE, GNU BASH and Python scripting Cadence Orcad, Altium Solidworks Modelsim (VHDL simulations) Vivado (VHDL, Verilog) Test equipment proficiency Scopes, logic ...
- 2023 Jan 02
San Jose, CA
... Participate in forecast calls with partner sales management teams and cadence calls with internal/external sales teams. Act as a subject matter expert by on-boarding and training partners for pre-sales/sales/delivery services development Oversee all ...
- 2022 Dec 25
Palo Alto, CA
... Team in the Silicon Valley featuring teammates of Google, Apple, Samsung, Facebook, Cadence, Cisco, Intel, HP, Microsoft, Journalists, Professors, tech professionals. Speech Communication – Santa Clara University Reference upon request KATIE NGUYEN
- 2022 Jul 05
San Jose, CA
... with IC Design and test/evaluation skill can be utilized SUMMARY Hands-on experience in designing the High Speed PMIC, PLL, RT-OSC, DAC and many Analog & Mixed Signal Design using Cadence Toolset, Analog Artist, Spectre, HSPICE, and Verilog-XL. ...
- 2022 Apr 29
Santa Clara, CA
... Worked on an internal project at Cadence Design Systems and moved an entire engineering department of 300 engineers and worked closely with a command center to coordinate the project. Worked effectively in start-ups and am flexible and adaptable to ...
- 2021 Oct 04
Campbell, CA
... Electronic Engineering Additional courses completed : Cadence Project Management, DFT, SJSU Microfabrication, JIT, TQC, PLC, Team Building, Time Management, Management and Leadership. 1998-1999
- 2021 Aug 12
Fremont, CA
... Familiar with analog to digital converter circuit designing Using Mentor graphic (PAD), Allegro and Cadence for design, modeling and simulations Experience in schematic capture design or PCB layout Experience in creating footprint and library ...
- 2021 Jul 02