| Resume alert | Resumes 1 - 10 of 389 |
Machine Learning, Electrical Engineering, Software Engineer
San Jose, CA
... ●Hardware: FPGA board, SoC, RTL Design, STA (Static Timing Analysis) ●Hardworking and detail-oriented ●Other skills: Machine Learning, Image Processing, Computer Vision Education San Jose State University Expected graduation: December 2024 M.S. ... - Jun 07
... ●Hardware: FPGA board, SoC, RTL Design, STA (Static Timing Analysis) ●Hardworking and detail-oriented ●Other skills: Machine Learning, Image Processing, Computer Vision Education San Jose State University Expected graduation: December 2024 M.S. ... - Jun 07
Business Development Project Management
Santa Clara, CA
... • 6.0KW, IGBT based, 32KV HVPS used to charge a 96 ηFD main storage capacitor banks • High voltage feedback, digitizing, and fiber optic conversion data modules (Manchester encoded) • Extensive PLD and FPGA design experience using Palasm and Cupl. ... - May 21
... • 6.0KW, IGBT based, 32KV HVPS used to charge a 96 ηFD main storage capacitor banks • High voltage feedback, digitizing, and fiber optic conversion data modules (Manchester encoded) • Extensive PLD and FPGA design experience using Palasm and Cupl. ... - May 21
Technical Writer Senior
Santa Clara, CA
... Adobe Photoshop, Illustrator, Captivate, Visio, Paintshop Pro, SnagIT Perforce, Cornerstone, Jira, Confluence, SharePoint, ClearCase Windows, Unix, Networking C/C++, Visual C++, Visual Basic, Java, JavaScript, Oracle/SQL Server, API, SDK FPGA. ... - May 02
... Adobe Photoshop, Illustrator, Captivate, Visio, Paintshop Pro, SnagIT Perforce, Cornerstone, Jira, Confluence, SharePoint, ClearCase Windows, Unix, Networking C/C++, Visual C++, Visual Basic, Java, JavaScript, Oracle/SQL Server, API, SDK FPGA. ... - May 02
Senior Design Verification Manager
Los Gatos, CA
... Align the DV team with the validation and software team for the FPGA need. Selected accomplishments: • Develop and implements the strategic plans for the verification team to keep up with the market and products demand. Defined the strategy to ... - May 02
... Align the DV team with the validation and software team for the FPGA need. Selected accomplishments: • Develop and implements the strategic plans for the verification team to keep up with the market and products demand. Defined the strategy to ... - May 02
Software Engineer Embedded
San Jose, CA
... Collaborated with FPGA engineer to implement the hard assist feature required for gPTP. Worked with tier-1 Japanese customer to implement their requirement. • Various embedded Linux development experience including OpenWRT, Jetson Linux for NVIDIA ... - Apr 23
... Collaborated with FPGA engineer to implement the hard assist feature required for gPTP. Worked with tier-1 Japanese customer to implement their requirement. • Various embedded Linux development experience including OpenWRT, Jetson Linux for NVIDIA ... - Apr 23
Lab Technician It Solution
Fremont, CA
... PLECS, Labview, Ultiboard, Adept 2.3, Proficy Machine Edition, Proficy HMI/SCADA CIMPLICITY, Powersim PSIM, Arduino IDE, FPGA ATRIX 7, Cyclone II, MS Office • Testing Tool: Oscilloscope, Function Generator, Counters and Network Analyzer, and tools ... - Apr 10
... PLECS, Labview, Ultiboard, Adept 2.3, Proficy Machine Edition, Proficy HMI/SCADA CIMPLICITY, Powersim PSIM, Arduino IDE, FPGA ATRIX 7, Cyclone II, MS Office • Testing Tool: Oscilloscope, Function Generator, Counters and Network Analyzer, and tools ... - Apr 10
C, Battery Management,, Embedded Linux, Linux device drivers
Fremont, CA, 94536
... : Power Saver Daemon (PowerPC and Intel platforms) - Hardware Debuggers : ARM9 (Lauterbach), USB Analyzer, Logic Analyzer, Wireshark - Hardware Chips : MAX6958, IDTP9145, PS8622, FX080021, TUSB1210, FPGA, CPLD, USB334x, SLG45078, TCA9535, PCAL6416A. ... - Mar 31
... : Power Saver Daemon (PowerPC and Intel platforms) - Hardware Debuggers : ARM9 (Lauterbach), USB Analyzer, Logic Analyzer, Wireshark - Hardware Chips : MAX6958, IDTP9145, PS8622, FX080021, TUSB1210, FPGA, CPLD, USB334x, SLG45078, TCA9535, PCAL6416A. ... - Mar 31
Machine Learning Data Scientist
Fremont, CA
... ENGINEER • RAMAN RESEARCH INSTITUTE, BANGALORE• AUGUST 2001 TO JANUARY 2004 Design and Implementation of Data Acquisition System for ISRO’s Satellite Astrometry project using VHDL on 40K GATE CPLDs and 300K-800k Gate FPGA and the device drivers ... - Mar 30
... ENGINEER • RAMAN RESEARCH INSTITUTE, BANGALORE• AUGUST 2001 TO JANUARY 2004 Design and Implementation of Data Acquisition System for ISRO’s Satellite Astrometry project using VHDL on 40K GATE CPLDs and 300K-800k Gate FPGA and the device drivers ... - Mar 30
Design Engineer Circuit
Cupertino, CA
... Other projects included PCB design, some FPGA. 3/98-7/98: Avanti Corporation, Fremont, CA Applications Engineer, supported circuit simulation software (HSPICE and Star-Sim) and addressed customer questions about circuit simulation software. 6/97-2 ... - Mar 23
... Other projects included PCB design, some FPGA. 3/98-7/98: Avanti Corporation, Fremont, CA Applications Engineer, supported circuit simulation software (HSPICE and Star-Sim) and addressed customer questions about circuit simulation software. 6/97-2 ... - Mar 23
Palo Alto Firmware Engineer
Menlo Park, CA
Stefan Craciun 352-***-**** — ad4igz@r.postjobfree.com **** ******* ***., * **** Alto, CA 94303 Professional Skills Algorithm mapping to digital architecture on FPGA fabric Identifying computational parallelism in applications and accelerating ... - Mar 22
Stefan Craciun 352-***-**** — ad4igz@r.postjobfree.com **** ******* ***., * **** Alto, CA 94303 Professional Skills Algorithm mapping to digital architecture on FPGA fabric Identifying computational parallelism in applications and accelerating ... - Mar 22