| Resume alert | Resumes 41 - 50 of 773 |
Physical Design Engineer
Bengaluru, KA, India
... Master of Technology in VLSI system design from B.V.Raju institute of Technology Narsapur Medak A.P with 74.69%. Kirankumar M - 2017 May 21
... Master of Technology in VLSI system design from B.V.Raju institute of Technology Narsapur Medak A.P with 74.69%. Kirankumar M - 2017 May 21
Vlsi/Asic/Soc/Fpga/Electronics
Bengaluru, KA, India
... GAIKWAD Tadas Lay Out, Raghuji Nagar, Po-Manas Mandir, Arvi road, Wadha 442001 Contact: +91-808*******, 950-***-**** Email: acz0ma@r.postjobfree.com VLSI / ASIC / SOC / FPGA / ELECTRONICS ENGINEER Seeking a challenging and rewarding opportunity with ... - 2017 Apr 27
... GAIKWAD Tadas Lay Out, Raghuji Nagar, Po-Manas Mandir, Arvi road, Wadha 442001 Contact: +91-808*******, 950-***-**** Email: acz0ma@r.postjobfree.com VLSI / ASIC / SOC / FPGA / ELECTRONICS ENGINEER Seeking a challenging and rewarding opportunity with ... - 2017 Apr 27
Engineer Operator
Bengaluru, KA, India
... Scalability to handle any number of remote location ADDITIONAL TRAINING Participated in one-day workshop on “Advanced Technology in VLSI Design & Telecommunication”. Participated in interactive lecture held by renowned Swiss Astronaut Prof. Calaude ... - 2017 Apr 24
... Scalability to handle any number of remote location ADDITIONAL TRAINING Participated in one-day workshop on “Advanced Technology in VLSI Design & Telecommunication”. Participated in interactive lecture held by renowned Swiss Astronaut Prof. Calaude ... - 2017 Apr 24
Design Software
Bengaluru, KA, India
... Summary: Completed Post Graduate Diploma in VLSI Design from CDAC ACTS, Pune. Hands on experience in RTL design, simulation and synthesis using Xilinx ISE tool. Good knowledge of HDL language like VHDL, VERILOG. Basic knowledge of 8085 ... - 2017 Apr 19
... Summary: Completed Post Graduate Diploma in VLSI Design from CDAC ACTS, Pune. Hands on experience in RTL design, simulation and synthesis using Xilinx ISE tool. Good knowledge of HDL language like VHDL, VERILOG. Basic knowledge of 8085 ... - 2017 Apr 19
PCB designing
Bengaluru, KA, India
... Technical skills : DIGITAL, ANALOG AND POWER ELECTRONICS, ANALOG, DIGITAL AND ADVANCED COMMUNICATION, COMPUTER HARDWARE AND NETWORK, VLSI, EMI 8051 MICROCONTROLLER, MICROPROCESSOR. COMPUTER SKILLS : MS Office, Hardware and networking(A+,N+), ... - 2017 Apr 13
... Technical skills : DIGITAL, ANALOG AND POWER ELECTRONICS, ANALOG, DIGITAL AND ADVANCED COMMUNICATION, COMPUTER HARDWARE AND NETWORK, VLSI, EMI 8051 MICROCONTROLLER, MICROPROCESSOR. COMPUTER SKILLS : MS Office, Hardware and networking(A+,N+), ... - 2017 Apr 13
Test Cases Project
Bengaluru, KA, India
... PCB Designing : Orcad Capture, Orcad Editor (Cadence Allegro [16.3]) EDUCATIONAL QUALIFICATION Secured 77.4 % in MTech (VLSI Design and embedded Systems) 2015 from B.I.T (Bangalore). Secured 60% in B.E.(Electronics and communications) 2013 from R.E ... - 2017 Mar 24
... PCB Designing : Orcad Capture, Orcad Editor (Cadence Allegro [16.3]) EDUCATIONAL QUALIFICATION Secured 77.4 % in MTech (VLSI Design and embedded Systems) 2015 from B.I.T (Bangalore). Secured 60% in B.E.(Electronics and communications) 2013 from R.E ... - 2017 Mar 24
Engineering Project
Bengaluru, KA, India
... COURSE INSTITUTE UNIVERSITY/ BOARD YEAR OF COMPLETION PERCENTAGE M.E(VLSI Design) United Institute of Technology Anna University 2015 77 B.E(ECE) Sri Shakthi Institute of Engineering and Technology Anna University 2013 82 HSC Vivekam Matriculation ... - 2017 Mar 22
... COURSE INSTITUTE UNIVERSITY/ BOARD YEAR OF COMPLETION PERCENTAGE M.E(VLSI Design) United Institute of Technology Anna University 2015 77 B.E(ECE) Sri Shakthi Institute of Engineering and Technology Anna University 2013 82 HSC Vivekam Matriculation ... - 2017 Mar 22
Assistant Software
Bengaluru, KA, India
... TRAINING: Underwent 30 days (200 hours) of training on “Electronic Design Automation Software Tools for VLSI/ASIC Design” at NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY, BERHAMPUR. ACHIEVEMENT: Qualified GATE exam Was TA (Teacher Assistant) in 3rd ... - 2017 Mar 18
... TRAINING: Underwent 30 days (200 hours) of training on “Electronic Design Automation Software Tools for VLSI/ASIC Design” at NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY, BERHAMPUR. ACHIEVEMENT: Qualified GATE exam Was TA (Teacher Assistant) in 3rd ... - 2017 Mar 18
Testing Engineer
Bengaluru, KA, India
... Course Institution University Year of passing Percentage M.tech (VLSI&ES) Vizag Institute of Technology Jawaharlal Nehru Technological University, Kakinada Pursuing 70% B.Tech (E.C.E) Vizag Iinstitute of Technology Jawaharlal Nehru Technological ... - 2017 Mar 08
... Course Institution University Year of passing Percentage M.tech (VLSI&ES) Vizag Institute of Technology Jawaharlal Nehru Technological University, Kakinada Pursuing 70% B.Tech (E.C.E) Vizag Iinstitute of Technology Jawaharlal Nehru Technological ... - 2017 Mar 08
cmos,digital design,layout,verilog,system verilog,oops,shell and perl
Bengaluru, KA, India
... TECHNICAL COURSE Completed The Post Graduate Diploma in VLSI Design & Technology using Cadence EDA Tools at Industrial Training and Research Institute (ITRI), Bangalore. CORE COMPETENCIES Hardware Languages Verilog & System Verilog. Verification ... - 2017 Feb 23
... TECHNICAL COURSE Completed The Post Graduate Diploma in VLSI Design & Technology using Cadence EDA Tools at Industrial Training and Research Institute (ITRI), Bangalore. CORE COMPETENCIES Hardware Languages Verilog & System Verilog. Verification ... - 2017 Feb 23