Vlsi/Asic/Soc/Fpga/Electronics

RESUME

AMIT G. GAIKWAD

Tadas Lay Out, Raghuji Nagar, Po-Manas Mandir, Arvi road, Wadha 442001

Contact: +91-808*******, 950-***-**** Email: acz0ma@r.postjobfree.com

VLSI / ASIC / SOC / FPGA / ELECTRONICS ENGINEER

Seeking a challenging and rewarding opportunity with an organization of repute which recognizes and utilizes my true potential while nurturing my analytical and technical skills

PROFILE

Equipped with the willingness to learn to keep abreast of new developments in the field; Ability to perform physical and instrumental analysis, as well as various electronics techniques.

Self-motivated, hardworking and goal-oriented with a high degree of flexibility, creativity, resourcefulness, commitment and optimism.

Six Month Training in VLSI & Embedded Hardware Design; 2016-17

National Institute of Electronics & Information Technology, Calicut (Kozhikode), Kerala.

MAJOR PROJECT IN VLSI

DMA Controller

MINI-PROJECT IN EMBEDDED HARDWARE DESIGN

Wheelchair Navigation Aid for Quadriplegics

MINI-PROJECT IN VLSI

8 Bit General Purpose Processor Using Verilog

Real Time Clock Using Verilog and Implement on Altera Cyclone FPGA Board

FIFO (Memory Buffers Used To Temporary Store Data) Using System Verilog

B.E ELECTRONICS ENGINEERING; 2015

Bapurao Deshmukh College of Engineering, Wardha 55.05%

PROJECT COMPLETED

DEGREE PROJECT

Automatic Gate Control and Track Switching

MINI-PROJECT

Electronics Stethoscope

SEMINAR

Embedded System for Sensing Global Disaster

EXTRA EDUCATIONAL CREDENTIALS

PG Diploma in VLSI & Embedded Hardware Design; 2017

National Institute of Electronics & Information Technology, Calicut (Kozhikode), Kerala.

DIPLOMA IN SPANISH LANGUAGE; 2015

Mahatma Gandhi Antarrashtriya Hindi Vishwavidyalaya, Wardha 8.25 ( A Grade )

SKILLS

Xilinx ISE tool suite

Altera Quartus tool suite

Synopsis VCS

Cadence tool suite

Cadence Virtuoso

OrCAD PCB Design tool

Physical Design

Modelsim Simulation tool suite

PCB Designing, Mounting & Troubleshooting

Knowledge of Hardware Description Languages (System Verilog, Verilog HDL, VHDL).

Knowledge of Digital Electronics, Semiconductors.

Knowledge of languages C,Oops

LANGUAGES KNOWN

ENGLISH,MARATHI, HINDI,SPANISH

PERSONAL PROFILE

Date of Birth: 10 Jan, 1990

Gender: Male

Nationality: Indian

DECLARATION

I hereby affirm that the information in this document is accurate and true to the best of my knowledge.

(Amit G. Gaikwad)

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