| Resume alert | Resumes 41 - 50 of 1388 |
Inplant Training Matric
Chennai, Tamil Nadu, India
... WORKSHOP ATTENDED Undergone Workshop on"Custom IC Design CADENCE EDA SuDite" at ASIC Centre of Excellence in Dr. Mahalingam college of Engineering and Technology PERSONAL DETAILS Father’s Name : MAHENDRAN R Occupation : Manager in central co ... - 2022 Feb 06
... WORKSHOP ATTENDED Undergone Workshop on"Custom IC Design CADENCE EDA SuDite" at ASIC Centre of Excellence in Dr. Mahalingam college of Engineering and Technology PERSONAL DETAILS Father’s Name : MAHENDRAN R Occupation : Manager in central co ... - 2022 Feb 06
Editor Pcb
Yelahanka, Karnataka, India
... school Madurai (2017) with 72.3% TOOLS KNOWLEDGE OrCAD (capture), OrCAD(Pspice),OrCAD(Pcb Editor) Proficient technical skills using the Cadence Allegro design toolset Strong working knowledge of OrCAD schematic capture and PCB design tools. ... - 2022 Feb 01
... school Madurai (2017) with 72.3% TOOLS KNOWLEDGE OrCAD (capture), OrCAD(Pspice),OrCAD(Pcb Editor) Proficient technical skills using the Cadence Allegro design toolset Strong working knowledge of OrCAD schematic capture and PCB design tools. ... - 2022 Feb 01
Solar Ece
Rasipuram, Tamil Nadu, India
... Basic knowledge in Cadence Encounter Tool. Comprehensive knowledge of Physical Design implementation, Physical Design strategies-Sanity checks, Floor Planning, Power Planning, Placement, CTS and Routing. EXPERIENCE Internship in VLSI Physical Design ... - 2021 Dec 12
... Basic knowledge in Cadence Encounter Tool. Comprehensive knowledge of Physical Design implementation, Physical Design strategies-Sanity checks, Floor Planning, Power Planning, Placement, CTS and Routing. EXPERIENCE Internship in VLSI Physical Design ... - 2021 Dec 12
Speaking, Microsoft office,tally,speed typing
Theni, Tamil Nadu, India
... higher secondary school,T.sindalaicherry 2014-2015 95.8% Technical skills MS-office C-programming Academic project Title: Design of dynamic comparator by using cadence Description: In electronics, the comparator is used to compare two voltages or ... - 2021 Nov 24
... higher secondary school,T.sindalaicherry 2014-2015 95.8% Technical skills MS-office C-programming Academic project Title: Design of dynamic comparator by using cadence Description: In electronics, the comparator is used to compare two voltages or ... - 2021 Nov 24
Design Engineer Dist
Tirupur, Tamil Nadu, India
... EDA tools Handled: Cadence Allegro V16.3, V16.5,V17.2(PCB Editor) with OR-CAD and Concept HDL Expedition 7.9.3(basic knowledge) Auto cad 2002 Designs Handled: DESIGN (Cadence - Allegro) More than 80+ designs handled in ATE probe card,load board and ... - 2021 Nov 24
... EDA tools Handled: Cadence Allegro V16.3, V16.5,V17.2(PCB Editor) with OR-CAD and Concept HDL Expedition 7.9.3(basic knowledge) Auto cad 2002 Designs Handled: DESIGN (Cadence - Allegro) More than 80+ designs handled in ATE probe card,load board and ... - 2021 Nov 24
Any profession
Chennai, Tamil Nadu, India
... 6.7 HSC Sri Vijay Vidyalaya (G) Matric Higher Secondary School(Dharmapuri) State Board 2015 67.8 SSLC Unity Matric Higher Secondary School(Dharmapuri) State Board 2013 82 TECHNICAL SKILL Tools MAT LAB MPLAB IDE CADENCE Languages C,C++, EMBEDDED C. ... - 2021 Oct 26
... 6.7 HSC Sri Vijay Vidyalaya (G) Matric Higher Secondary School(Dharmapuri) State Board 2015 67.8 SSLC Unity Matric Higher Secondary School(Dharmapuri) State Board 2013 82 TECHNICAL SKILL Tools MAT LAB MPLAB IDE CADENCE Languages C,C++, EMBEDDED C. ... - 2021 Oct 26
Sram Rpg
New Delhi, Delhi, India
... Cadence Virtuoso and EDA tanner tool were used for simulations and calculations. PUBLICATIONS P. Singh and S. Dahiya. “A Comparative Study of Various SRAM Cells”, International Journal of Engineering Applied Sciences and Technology, Vol. 5, Issue 3, ... - 2021 Oct 25
... Cadence Virtuoso and EDA tanner tool were used for simulations and calculations. PUBLICATIONS P. Singh and S. Dahiya. “A Comparative Study of Various SRAM Cells”, International Journal of Engineering Applied Sciences and Technology, Vol. 5, Issue 3, ... - 2021 Oct 25
Systems Ltd Electronics Engineer
Noida, Uttar Pradesh, India
HARDEEP SINGH (ME Electronics with ** years of experience in Development and Manufacturing) Email: ado5b6@r.postjobfree.com, Mobile: +91-981******* Career Summary I am experienced in Development, ToT with foreign/Indian vendors and Project... - 2021 Oct 25
HARDEEP SINGH (ME Electronics with ** years of experience in Development and Manufacturing) Email: ado5b6@r.postjobfree.com, Mobile: +91-981******* Career Summary I am experienced in Development, ToT with foreign/Indian vendors and Project... - 2021 Oct 25
Hse Ece
Chennai, Tamil Nadu, India
... Girls Hr.Sec.School State board 2013 92% AREA OF INTEREST: Electronic Devices Digital Electronics WORKSHOP ATTENTED: Participated in five days workshop on “Cadence and Synopsys Design Compiler Tool “at Einstein College Of Eingineering,Tirunelveli. ... - 2021 Oct 22
... Girls Hr.Sec.School State board 2013 92% AREA OF INTEREST: Electronic Devices Digital Electronics WORKSHOP ATTENTED: Participated in five days workshop on “Cadence and Synopsys Design Compiler Tool “at Einstein College Of Eingineering,Tirunelveli. ... - 2021 Oct 22
Vellore D S
Hyderabad, Telangana, India
... 2014 95.08 SSLC D S Saradha Vidhaya- laya Girls Higher Sec- ondary School,Gobi 2012 88.6 SKILL SET Programming: C, C++ and Verilog Software: Tanner, Xilinx, Cadence virtuoso, Modelsim AREA OF INTEREST Low power Digital Electronics Quantum Neural ... - 2021 Sep 27
... 2014 95.08 SSLC D S Saradha Vidhaya- laya Girls Higher Sec- ondary School,Gobi 2012 88.6 SKILL SET Programming: C, C++ and Verilog Software: Tanner, Xilinx, Cadence virtuoso, Modelsim AREA OF INTEREST Low power Digital Electronics Quantum Neural ... - 2021 Sep 27