Vellore D S
Resume:
R.Indhumathi
***********@*****.***
CAREER OBJECTIVE:
Hardworking Candidate with an ability to think analytically and finding creative solutions to problems, seeking an opportunity to work and develop with the Company. ACADEMIC PERFORMANCE:
COURSE OF
STUDY
INSTITUTE YEAR OF PASSING PERENTAGE OF
MARKS
Master of Engineering
(VLSI Design)
Kongu Engineering
College
Perundurai-638060
2021 95.3
B.E( Electronics and
Communication Engi-
neering)
Kongu Engineering
College
Perundurai-638060
2018 81.2
HSC
Saradha Matriculation
Higer Secondary
School,Modachur,Gobi.
2014
95.08
SSLC
D S Saradha Vidhaya-
laya Girls Higher Sec-
ondary School,Gobi
2012
88.6
SKILL SET
Programming: C, C++ and Verilog
Software: Tanner, Xilinx, Cadence virtuoso, Modelsim AREA OF INTEREST
Low power
Digital Electronics
Quantum
Neural Network
CERTIFICATION COURSES
Modelling of Digital logic circuits designing using VHDL conducted by TBI
Attended Two days Training Programme on “Semi Custom and Full Custom VLSI Design using Cadence EDA Tool” held at Kongu Engineering College, Erode CO-CURRICULAR ACTIVITIES
Papers Presented:
Paper on the topic Smart Roofing System for Farmers in International tech fest at Vellore Institute of Technology, Vellore
Paper on the topic Modified Drying System for Farmers in State level tech fest at Bannari amman Institute of Technology, Sathyamangalam
Paper on the topic Drying System for Farmers in State level tech fest at Coimbatore Institute of Technology, Coimbatore
Paper on the topic Roofing System for Farmers in Agriculture in State level tech fest at Kongu Engineering College, Perundurai
Paper on the topic Smart Roofing System for Farmers in National level tech fest at Karpagam College of Engineering, Coimbatore
Project Presented:
Smart Roofing System for Farmers in Socon’17(National level tech fest) held at Vellore Institute of Technology, Vellore
Home Security System on Open House Exibition (National level tech fest) held at Kongu Engineering College, Perundurai
Project Completed:
An Efficient Segmentation approach for Multi-Font English Language from Historical Documents using MATLAB software
Feature Extraction and Classification Technique for the Recognition of Historical Documents Image using Maximally Stable Extremal Region (MSER) Algorithm using MATLAB software
Design of 4-Bit Ripple Carry Adder using Circuit Families using Tanner EDA Version 13 software
Optimizing the Convolution Operation to Accelerate Deep Neural Networks on FPGA using Xilinx and MATLAB software
Optimizing the Fast Convolution Architecture for Deconvolutional Network Acceleration on FPGA using Xilinx and MATLAB software
Journals Published (International):
Indhumathi R, Gavaskar K, Nandhini S R and Raja Nandhini J,'Design of Ripple Carry Adder using Pseudo NMOS, Dynamic Circuits and Pass Transistor Logic' International Journal of Modern Computation, Information and Communication Technology, Volume 3, issue 9-10, pp.77- 84, October 2020
Indhumathi R, Gavaskar K, Nandhini S R and Raja Nandhini J,'A Novel Design and Analysis of Low power Multipliers using Full Swing Gate Diffusion Input Method' International Journal of Modern Science and Technology, Volume 5, issue 11, pp.251-265, November 2020
Nandhini S R, Raja Nandhini J, Gavaskar K and Indhumathi R, 'Optimization of Dual Threshold MOSFET for 1-bit Full adder cell' International Journal of Modern Computation, Information and Communication Technology, Volume 3, issue 11-12, pp.85-92, November 2020 Paper Presented in National Conferences:
Indhumathi R, Gavaskar K, Nandhini S R and Raja Nandhini J 'A Novel Design and Analysis of Low Power Multipliers using Full Swing Gate Diffusion Input Method' National Confer- ence on Communication Systems (NCOCS-2020) at National Institute of Technol- ogy Puducherry, Karaikal on 11th November 2020
Raja Nandhini J, Gavaskar K, Nandhini S R and Indhumathi R 'Design of Flip Flops using Transmission Gate D latch' National Conference on Communication Systems (NCOCS-2020) at National Institute of Technology Puducherry, Karaikal on 11th November 2020
Nandhini S R, Gavaskar K, Indhumathi R and Raja Nandhini J 'Design and Analysis of Area Ef- ficient Adders using MTV Logic based Gate Diffusion Techniques' National Confer- ence on Communication Systems (NCOCS-2020) at National Institute of Technol- ogy Puducherry, Karaikal on 11th November 2020
ACHIEVEMENTS
Got 3rd place in National level project display
Got 1st place in State level paper presentation
EXTRA CURRICULAR ACTIVITIES
Got 1st place in volleyball in intra school competition INDUSTRIAL EXPOSURE
In Plant Training:
5 days training to BSNL Erode during 08.12.14 to 12.12.14
6 days training to HCL CDC Coimbatore during 18.05.2016 to 23.05.2016 MEMBERSHIP DETAILS:
Member of ISTE Association
An active member of IETE Association
Member in young India club
PERSONAL PARTICULARS:
D.O.B & Age 28.02.1997 & 23
Father’s name Rajendran D
Mother’s name Rajangam R
Address 40,Dhassappan Street, Gobichettipalayam-638452. Language Known Tamil, English.
DECLARATION:
I hereby assert that all the above details are true to the best of my knowledge. Place: Gobichettipalayam,
Date:
Signature
(Indhumathi R)
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