| Resume alert | Resumes 21 - 30 of 1365 |
Design Engineer High Speed
Chennai, Tamil Nadu, India
... Telephone +918********* adzwp5@r.postjobfree.com CAREER OBJECTIVE: PCB DESIGN ENGINEER Objective To apply my knowledge and 3 years’ experience in PCB designing and to develop efficient and effective systems using my skills in Altium, Cadence Allegro ... - 2023 Sep 24
... Telephone +918********* adzwp5@r.postjobfree.com CAREER OBJECTIVE: PCB DESIGN ENGINEER Objective To apply my knowledge and 3 years’ experience in PCB designing and to develop efficient and effective systems using my skills in Altium, Cadence Allegro ... - 2023 Sep 24
Cadence and verilog hardware description language.
Bangalore, Karnataka, India
PANDU GAUTHAM Email: adzmjh@r.postjobfree.com Address: D.no- 2-244/7,cheediga revenue colony, Kakinada,Kakinada Dist.,Andhra Pradesh ,India. pin- 533006. Phone: 949-***-**** CAREER OBJECTIVE Secure a responsible career opportunity to fully utilize... - 2023 Sep 11
PANDU GAUTHAM Email: adzmjh@r.postjobfree.com Address: D.no- 2-244/7,cheediga revenue colony, Kakinada,Kakinada Dist.,Andhra Pradesh ,India. pin- 533006. Phone: 949-***-**** CAREER OBJECTIVE Secure a responsible career opportunity to fully utilize... - 2023 Sep 11
Verilog coding
Visakhapatnam, Andhra Pradesh, India
... 2016, visakhapatnam, 65% SKILLS verilog coding basics of c programming c++ Basics of java and python commuication skills problem solving team work can work under stressed conditions basic computer knowledge time management can handle cadence,linux. ... - 2023 Sep 11
... 2016, visakhapatnam, 65% SKILLS verilog coding basics of c programming c++ Basics of java and python commuication skills problem solving team work can work under stressed conditions basic computer knowledge time management can handle cadence,linux. ... - 2023 Sep 11
Control Systems Fpga Design
Visakhapatnam, Andhra Pradesh, India
... AP 10th grade (2014) CGPA - 7.0 Specializations Areas of interest Technical Skills: Digital Circuits,Verilog Verilog,Cadence,C,Ptyhon(basics) ASIC, FPGA, Cadence(RTL-GDS) Simulation Software: Cadence Virtuoso, TopSpice, Xilinx Vivado Projects ... - 2023 Sep 11
... AP 10th grade (2014) CGPA - 7.0 Specializations Areas of interest Technical Skills: Digital Circuits,Verilog Verilog,Cadence,C,Ptyhon(basics) ASIC, FPGA, Cadence(RTL-GDS) Simulation Software: Cadence Virtuoso, TopSpice, Xilinx Vivado Projects ... - 2023 Sep 11
Engineer
Davanagere, Karnataka, India
... TOOLS LEARNT: • Cadence virtuoso schematic editor • Cadence virtuoso layout editor, Calibre, Assura. INTERNSHIP: • Evo-trix technologies private limited Circuit design and layout design of Inverter (1x, 2x, 4x, 16x, 32x) with 180nm technology by ... - 2023 Aug 29
... TOOLS LEARNT: • Cadence virtuoso schematic editor • Cadence virtuoso layout editor, Calibre, Assura. INTERNSHIP: • Evo-trix technologies private limited Circuit design and layout design of Inverter (1x, 2x, 4x, 16x, 32x) with 180nm technology by ... - 2023 Aug 29
Design Engineer Layout
Bangalore, Karnataka, India
... EDA Tools and Expertise: Custom Layout design using Cadence Virtuoso and Virtuoso-XL, Mentor Pyxis. Layout Verification (DRC, LVS) using Calibre,PVS. Chip level DRC & LVS and over-all responsibility of Blocks Experience in fixing IR issues. Hands on ... - 2023 Jul 18
... EDA Tools and Expertise: Custom Layout design using Cadence Virtuoso and Virtuoso-XL, Mentor Pyxis. Layout Verification (DRC, LVS) using Calibre,PVS. Chip level DRC & LVS and over-all responsibility of Blocks Experience in fixing IR issues. Hands on ... - 2023 Jul 18
Core java, Oracle
Hyderabad, Telangana, India
... CERTIFICATIONS Cadence Design Systems Mar 2022 Attended and Gertived a three-day workshop on Gadence Design Systems SKILLS Python java HTML PERSONAL SKILLS z Eagerness to learn new skills z Determined and Dedicated towards work z Self-motiUated and ... - 2023 Jul 11
... CERTIFICATIONS Cadence Design Systems Mar 2022 Attended and Gertived a three-day workshop on Gadence Design Systems SKILLS Python java HTML PERSONAL SKILLS z Eagerness to learn new skills z Determined and Dedicated towards work z Self-motiUated and ... - 2023 Jul 11
Associate Engineer
Hyderabad, Telangana, India
... Cadence Mixed Signal Simulation 11 Mar 2022 Entuple Xechnologies pvt. Ltd Xhe miUedRsignal simulation process involves creating a virtual representation of the circuit using a schematic or a hardware description language (HDL), which de8nes the ... - 2023 Jul 11
... Cadence Mixed Signal Simulation 11 Mar 2022 Entuple Xechnologies pvt. Ltd Xhe miUedRsignal simulation process involves creating a virtual representation of the circuit using a schematic or a hardware description language (HDL), which de8nes the ... - 2023 Jul 11
Indian cook
Mumbai, Maharashtra, India
... 2002 - 04/2004 07/2001 - 07/2002 03/2000 - 05/2001 LANGUAGES Chef FORTIS HOSPITAL - India Head Chef CHOKHI DHANI DASTAR RESTAURANT - India Sous Chef Lite bite Foods by SAVOUR FOOD COURT - India Sous Chef Sodexo at Cadence Design Systems (India) Pvt. ... - 2023 Jul 01
... 2002 - 04/2004 07/2001 - 07/2002 03/2000 - 05/2001 LANGUAGES Chef FORTIS HOSPITAL - India Head Chef CHOKHI DHANI DASTAR RESTAURANT - India Sous Chef Lite bite Foods by SAVOUR FOOD COURT - India Sous Chef Sodexo at Cadence Design Systems (India) Pvt. ... - 2023 Jul 01
Prevention Manager Room Operator
Aerodrome Area, Odisha, India
... •Design and conduct a cadence of regular audits to evaluate the performance of security team members, contracts, and established SOPs. •Manage the day-to-day physical security and safety operations for all offices, security guard services, business ... - 2023 May 02
... •Design and conduct a cadence of regular audits to evaluate the performance of security team members, contracts, and established SOPs. •Manage the day-to-day physical security and safety operations for all offices, security guard services, business ... - 2023 May 02