Manufacturing / Process Engineer with over 15 years of high-tech, micro-electronics manufacturing experience and Education
• OWNER SHIP of Thin film processes like Sputtering, PVD, CVD, ALD, Dry etch, RIE (Plasma Term)
• Process integration from R&D to high volume manufacturing
• 200 mm Wafer fab, Thin film, Photo lithography, wet etch, dry etch, milling
• Quality- CAPA, KANBAN, Kaisen
• Semiconductor Manufacturing
• Lean manufacturing, Lean 6 Sigma, GMP,
• Failure analysis, DMAIC, 8D, 6S
• Manufacturing of heads for Hard Drives
• Training 500 people in 8 years
• Installation of equipment and tooling modifications
• Vacuum Metallization
• Knowledge of vacuum systems
• OSHA certified for 10 hrs. training for construction safety EXPERIENCE
Western Digital, Fremont, CA 15 years June 2004-May 2019 Principal Engineer
• Lean Manufacturing Methodologies
Head manufacturing cycle time/ cost reduction. Improvements in production line efficiency. Managed suppliers to improve their performance, reduce overall cost of manufacturing and logistics.
• Process Engineering
Qualification of Bottom Anti-Reflected Coating in Plasma Therm tool for photo litho-graphy. Ownership of tools and processes for thin films, di-electric and precious metals deposition, and dry etching including sputtering, RIE, CVD, PVD tools like Symetra, CVC, Comptech, Plasma Therm, Tegal. Familiar with metrology tools, like SEM, AFM, Nano, 4-point probe, BHlooper, XRD and use of microscope. Updating procedures and specifications. Analyzed, identified, and resolved process issues and developed new processes, and transferring new processes from R&D to production.
• Manufacturing Production
Worked closely with production and manufacturing teams, resolved issues in minimum time. Due to vast hands-on experience, other groups and departments wanted me to be on their team to understand the issues and fixes. Modified micro electronics manufacturing tool, like Tencor, and design of new support fixture to tape glass monitor with AlTiC wafer without touching then wafers. Introduce may fixture and modification tools in the fab to reduce cycle time. Worked on Plasma Therm to deposit BARC film, first time fully released the tool to production and fixed all issues.
• Root Cause Analysis
Accuracy in Data collection, running tests, analysis results, and fixing root causes or suggested possible solutions. Fixed process to avoid breaking wafers in Anelva due to thermal shock. Fixing wafer clamshell carriers and storage racks to stop breaking wafers. Performed failure analysis to support various groups, using microscope, SEM, Joel and EDX, for example analyze particle or contamination and getting detail about elements or source of contamination. Fixed major tool and recipe issues at R&D level and saved 300K
• Starting new 200 mm wafer pilot line
Converted fab from 150 mm to 200 mm wafers. Planned and tested the key tools to made them ready to run pipe cleaners. Started 200 mm wafer pilot line as a strong team member.
• Continuous Improvement
Designed and manufactured fixtures and modification in production tools, as per customized requirements considering continuous improvement for process and wafer handling. Utilized experience of semi-conductor manufacturing and working in clean room fabs, fixed issues in minimum time and cost in simplest way. Continuously listen to the feedback from manufacturing floor and modified tool and process to save production time and waste
• Problem solving/ Troubleshooting
Worked with Photolithography team to identify the root cause of hot spot in ASML and reduced rework rate from 17 wafers per week to 5 wafers per week. Saving cost $30k/year
• Training and Development
Trained 600 plus employees in last 8 years including operators, technician, and Engineers for using techniques for handling wafers in high tech clean room fabs, with detailed documentation.
• Supply Chain Management
Modified production tools from design, manufacture, install, test, training and documentation. Designed support tools for the fab to help doing jobs more accurately. To achieve this, worked closely with machine shops and vendors. Ordering parts and getting them from vendors in special cases.
• Collaborative Team Member
• Dependable and Task Driven
• Familiarity with FPS and MKS systems. In-depth knowledge of units
• Familiarity with photo, plate and etch processing Read-Rite Corporation, Fremont, CA 4 years
Senior Process Engineer May 2000-March 2004
Controlled tool and processes including PVD, CVD, RIE. Resolved production issues, qualifying new recipes and processes and transferred from R&D to Production. Knowledge of different types of wafers. Applied Magnetics, Santa Barbara, CA 3 years
Process Engineer Sep 1997- Dec 2000
Maintained micro-electronics manufacturing processes, disposition product. Worked in shifts and supported Thin Film area.
Chemical Coating Industries, Karachi, Pakistan 7 years Jun 1989 -July 1996 Maintenance Engineer
Maintaining metallization plant, maintenance of vacuum pumps, installation of cooling towers and supervise machine shop for spare parts and metal cylinders for color printing machines. Experience moving heavy equipment. Loading unloading containers EDUCATION
• Master of Science (MS), Industrial Engineering
University of Oklahoma, Norman, OK
• Bachelor of Science (BS), Mechanical Engineering NED University of Engineering and Technology, Karachi US citizen
Western Digital Fremont, California;
Direct report to:
Director Manufacturing- Piyush Desai