| Distance: | Resume alert | Resumes 131 - 140 of 6504 |
Design Engineer Electrical
Somers, NY
... • Invented the usage of Optical Interconnects for VLSI chip design using Vertical Cavity Surface Emitting Lasers. • Established Architecture and logic design for inter-chip and IBM Inter Processor Communication. • Developed a novel method for the ... - 2024 Aug 07
... • Invented the usage of Optical Interconnects for VLSI chip design using Vertical Cavity Surface Emitting Lasers. • Established Architecture and logic design for inter-chip and IBM Inter Processor Communication. • Developed a novel method for the ... - 2024 Aug 07
Application Engineer Software
Pleasanton, CA
... EDUCATION Master of Science in VLSI Engineering San Jose Polytechnic University – San Jose, CA. Uncompleted Feb 2018 Bachelor of Science in Computer System Engineering Northwest Polytechnic University – Fremont, CA. Completed Dec 2015 Associate ... - 2024 Aug 06
... EDUCATION Master of Science in VLSI Engineering San Jose Polytechnic University – San Jose, CA. Uncompleted Feb 2018 Bachelor of Science in Computer System Engineering Northwest Polytechnic University – Fremont, CA. Completed Dec 2015 Associate ... - 2024 Aug 06
Level Data Integrity
Santa Clara, CA
... Education: ●MSEE (VLSI Design, DSP and Computer architecture) (San Francisco Bay University, Fremont, CA) ●AMIE (Associate Member of Institution of Engineers, Kolkata, India) in Electronics & Communication Engineering ACHIEVEMENTS ●Implemented a ... - 2024 Aug 06
... Education: ●MSEE (VLSI Design, DSP and Computer architecture) (San Francisco Bay University, Fremont, CA) ●AMIE (Associate Member of Institution of Engineers, Kolkata, India) in Electronics & Communication Engineering ACHIEVEMENTS ●Implemented a ... - 2024 Aug 06
Principal Electrical Engineer
Chatsworth, CA
... NASA SBIR REVIEWER JPL/NASA SBIR Reviewer for 1999 Small Business Initiative Research (SBIR) task on VLSI, Nano-Technology Sensor development and on solid-state electronic development topics. PUBLICATIONS Victor Boyadzhyan, “Wave guide Transfer ... - 2024 Aug 06
... NASA SBIR REVIEWER JPL/NASA SBIR Reviewer for 1999 Small Business Initiative Research (SBIR) task on VLSI, Nano-Technology Sensor development and on solid-state electronic development topics. PUBLICATIONS Victor Boyadzhyan, “Wave guide Transfer ... - 2024 Aug 06
Sr Embedded Software QA
Pflugerville, TX
... GRADUATE COURSEWORK September 2010 – May 2010 Digital Systems and Logic Design, MATLAB, computer architecture, advanced digital IC design (VHDL, VLSI, and FPGA) HONORS ● Participated in paper presentation on Software Development Life Cycle in ... - 2024 Aug 06
... GRADUATE COURSEWORK September 2010 – May 2010 Digital Systems and Logic Design, MATLAB, computer architecture, advanced digital IC design (VHDL, VLSI, and FPGA) HONORS ● Participated in paper presentation on Software Development Life Cycle in ... - 2024 Aug 06
Qa Engineer Automation
Pune, Maharashtra, India
... 2024 – Present Encora (Excellarate), Pune Junior QA Engineer Dec 2021 – Jan 2024 Encora (Excellarate), Pune Education ME in VLSI & ES (2018-2021) Pune University BE in E&TC (2012-2015) Pune University Diploma in Industrial Electronic(2009-2012) ... - 2024 Aug 06
... 2024 – Present Encora (Excellarate), Pune Junior QA Engineer Dec 2021 – Jan 2024 Encora (Excellarate), Pune Education ME in VLSI & ES (2018-2021) Pune University BE in E&TC (2012-2015) Pune University Diploma in Industrial Electronic(2009-2012) ... - 2024 Aug 06
Electronics tech
Austin, TX
... devices, III/V devices, MEMS Undergraduate coursework: EE required courses, in addition to VLSI, DSP, applied electromagnetics, biomedical instrumentation, Computer-aided Digital Design, and biology/chemistry courses for the double major. ... - 2024 Aug 02
... devices, III/V devices, MEMS Undergraduate coursework: EE required courses, in addition to VLSI, DSP, applied electromagnetics, biomedical instrumentation, Computer-aided Digital Design, and biology/chemistry courses for the double major. ... - 2024 Aug 02
Test Technician Qc
Boston, MA
... Worked with R&D on the development and introduction of a single board VLSI based design, replacing a 5-board system. Helped maintain Quality records. Trained other technicians as required. Education Associates in Electronics Technology GTE Sylvania ... - 2024 Jul 25
... Worked with R&D on the development and introduction of a single board VLSI based design, replacing a 5-board system. Helped maintain Quality records. Trained other technicians as required. Education Associates in Electronics Technology GTE Sylvania ... - 2024 Jul 25
Sales Manager Outside
Phoenix, AZ
... Nazemi et al, “ A 10.3Gb/s 6bit Time-Interleaved/Pipelined ADC using Open-Loop Amplifiers and Digital Calibration in 90nm CMOS,” VLSI Circuits, June 2008. O. Agazzi et al, “A 90nm CMOS DSP MLSD Transceiver with integrated AFE for Electronic ... - 2024 Jul 21
... Nazemi et al, “ A 10.3Gb/s 6bit Time-Interleaved/Pipelined ADC using Open-Loop Amplifiers and Digital Calibration in 90nm CMOS,” VLSI Circuits, June 2008. O. Agazzi et al, “A 90nm CMOS DSP MLSD Transceiver with integrated AFE for Electronic ... - 2024 Jul 21
Front End Embedded Software
India
... Recently I qualified courses on VLSI Signal Processing, “CMOS Digital VLSI Design, and Hardware Modelling using Verilog from IIT’s. • I have been Principal/Director at LIET, Alwar, IIST, Indore, AIT Alwar and SBMN Engineering College, Rohtak. • I ... - 2024 Jul 21
... Recently I qualified courses on VLSI Signal Processing, “CMOS Digital VLSI Design, and Hardware Modelling using Verilog from IIT’s. • I have been Principal/Director at LIET, Alwar, IIST, Indore, AIT Alwar and SBMN Engineering College, Rohtak. • I ... - 2024 Jul 21