| Resume alert | Resumes 11 - 20 of 119 |
Engineering Safety
Pune, Maharashtra, India
... TRAINING VLSI designing (Verilog) summer training for 1 month in Hyderabad. Industrial Automation for six days. SEMINAR PRESENTED Seminar presented on “3D FPGA VS MULTIPLE FPGA” in Bachelor of Engineering in Electronics and Telecommunication held at ... - 2021 Feb 13
... TRAINING VLSI designing (Verilog) summer training for 1 month in Hyderabad. Industrial Automation for six days. SEMINAR PRESENTED Seminar presented on “3D FPGA VS MULTIPLE FPGA” in Bachelor of Engineering in Electronics and Telecommunication held at ... - 2021 Feb 13
Design Engineer
Pune, Maharashtra, India
... Intern at Infineon Technologies, Pune Duration: 01/07/2019 to 29/05/2020 >>Education Level Stream Board/University Passing Year CGPA/Percentage M.Tech VLSI & Embedded Systems College Of Engineering,Pune 2020 7.82 B.Tech Electronics and Telecom. ... - 2021 Feb 12
... Intern at Infineon Technologies, Pune Duration: 01/07/2019 to 29/05/2020 >>Education Level Stream Board/University Passing Year CGPA/Percentage M.Tech VLSI & Embedded Systems College Of Engineering,Pune 2020 7.82 B.Tech Electronics and Telecom. ... - 2021 Feb 12
Design Engineer
Pune, Maharashtra, India
... Familier with VLSI Physical Design, Physical Verificartion,STA & Synthesis. Knowledge on Analog circuit design & Analog Mixed Signal VLSI Design. Ability to work independently as well as part of a team. Quick learner with Good analytical and problem ... - 2021 Feb 12
... Familier with VLSI Physical Design, Physical Verificartion,STA & Synthesis. Knowledge on Analog circuit design & Analog Mixed Signal VLSI Design. Ability to work independently as well as part of a team. Quick learner with Good analytical and problem ... - 2021 Feb 12
Engineer Machine
Pune, Maharashtra, India
... Visual inspection Counting of material Kit verification PROJECT DETAILS PROJECT : 1 Title : Smart City based on IOT PROJECT : 2 Title : Android based voice notice board FIELD OF INTERESTS VLSI design. Circuit design. Iot system design. Embedded ... - 2021 Feb 12
... Visual inspection Counting of material Kit verification PROJECT DETAILS PROJECT : 1 Title : Smart City based on IOT PROJECT : 2 Title : Android based voice notice board FIELD OF INTERESTS VLSI design. Circuit design. Iot system design. Embedded ... - 2021 Feb 12
Engineer Design
Pune, Maharashtra, India
... May 2019 CGPA: 7.16 PG Diploma In VLSI CDAC CDAC Noida Feb 2020 72 Knowledge About Programming: • Basic knowledge about C. • Sound Knowledge of C++. • Basics of shell script programming HDL: • Verilog Verification Language: • Sound Knowledge System ... - 2021 Feb 08
... May 2019 CGPA: 7.16 PG Diploma In VLSI CDAC CDAC Noida Feb 2020 72 Knowledge About Programming: • Basic knowledge about C. • Sound Knowledge of C++. • Basics of shell script programming HDL: • Verilog Verification Language: • Sound Knowledge System ... - 2021 Feb 08
Senior HR executive
Pune, Maharashtra, India
... Organisation: DLB Technosys, Phagwara June 9 – July 19, 2014 Description: Got the overview of VLSI and helped in writing codes for small projects. PROJECTS UNDERTAKEN Project: Talent Management: A study of attitude of banking sector employees ... - 2021 Jan 05
... Organisation: DLB Technosys, Phagwara June 9 – July 19, 2014 Description: Got the overview of VLSI and helped in writing codes for small projects. PROJECTS UNDERTAKEN Project: Talent Management: A study of attitude of banking sector employees ... - 2021 Jan 05
Engineering Design
Pune, Maharashtra, India
... Nagpur 2020 Bachelor of engineering 8.7 Smec labs 2020 PG DIPLOMA IN VLSI Projects Development of smart banking machine In this project we are increasing authentication and security of ATM. using face detection with the link of adhar card Real time ... - 2020 Dec 29
... Nagpur 2020 Bachelor of engineering 8.7 Smec labs 2020 PG DIPLOMA IN VLSI Projects Development of smart banking machine In this project we are increasing authentication and security of ATM. using face detection with the link of adhar card Real time ... - 2020 Dec 29
Design Engineer Power
Pune, Maharashtra, India
... Served as a Lab Instructor in MKCL Company provided technical resources for VLSI training program under MKCL. Responsibility: Guiding student in their Lab assignments and projects. Trainings Undergone: Post graduate diploma in VLSI Design in the ... - 2020 Nov 04
... Served as a Lab Instructor in MKCL Company provided technical resources for VLSI training program under MKCL. Responsibility: Guiding student in their Lab assignments and projects. Trainings Undergone: Post graduate diploma in VLSI Design in the ... - 2020 Nov 04
Data Project
Pune, Maharashtra, India
... Attended the National Level Conference on ‘Recent Trades in Embedded System, Communication and VLSI Design’. Published National Level Paper in IJSER journal. Successfully passed Elementary and Intermediate grade examinations. REFERANCES 1) Mr. Anish ... - 2020 Oct 12
... Attended the National Level Conference on ‘Recent Trades in Embedded System, Communication and VLSI Design’. Published National Level Paper in IJSER journal. Successfully passed Elementary and Intermediate grade examinations. REFERANCES 1) Mr. Anish ... - 2020 Oct 12
Engineering Executive
Pune, Maharashtra, India
... Basic knowledge : Telecommunication, VLSI, Micro-controller 8051, 89C51, Embedded system PROJECT DETAILS • Title: Environment monitoring system using soil energy • Objective: To generate electricity from soil using cathodes and anodes with Zinc and ... - 2020 Oct 12
... Basic knowledge : Telecommunication, VLSI, Micro-controller 8051, 89C51, Embedded system PROJECT DETAILS • Title: Environment monitoring system using soil energy • Objective: To generate electricity from soil using cathodes and anodes with Zinc and ... - 2020 Oct 12