| Resume alert | Resumes 1 - 10 of 11 |
Information Security Social Media
Mission Viejo, CA
... Relevant coursework: VLSI System Design, Linear Control Systems, Signals and Systems, Data transfer, Electric Circuits I, II, Electronic Digital, Electronic Circuits. Areas of Expertise and Interest Software Engineering, Database Management System, ... - 2021 Mar 04
... Relevant coursework: VLSI System Design, Linear Control Systems, Signals and Systems, Data transfer, Electric Circuits I, II, Electronic Digital, Electronic Circuits. Areas of Expertise and Interest Software Engineering, Database Management System, ... - 2021 Mar 04
Python, Tensorflow, Numpy, PyTorch, C/C++, JAVA, R, Machin Learning
Riverside, CA
... MIPS Layout Design and Timing Analysis VLSI SHARiF UNiVERSiTY OF TECHNOLOGY B.Sc. • Designed a simple 8 bit MIPS CPU with cadence design compiler(layout and timing analysis). End to End and Cached messaging Application in Android Data Networks ... - 2021 Feb 02
... MIPS Layout Design and Timing Analysis VLSI SHARiF UNiVERSiTY OF TECHNOLOGY B.Sc. • Designed a simple 8 bit MIPS CPU with cadence design compiler(layout and timing analysis). End to End and Cached messaging Application in Android Data Networks ... - 2021 Feb 02
Manager Program
Fallbrook, CA, 92028
... General Instrument, San Diego CA, 1988 – 2003 Project Engineer, Test and integration of VLSI custom IC's into satellite receivers and encrypted modules. PROFESSIONAL DEVELOPMENT & CREDENTIALS MBA/TM (Technology Management) University of Phoenix San ... - 2020 Jun 29
... General Instrument, San Diego CA, 1988 – 2003 Project Engineer, Test and integration of VLSI custom IC's into satellite receivers and encrypted modules. PROFESSIONAL DEVELOPMENT & CREDENTIALS MBA/TM (Technology Management) University of Phoenix San ... - 2020 Jun 29
Electrical Engineering Information Technology
Lake Elsinore, CA
... September 2010 to June 2014 Dalian Jiao Tong University Information Technology Institute - Dalian, China Related Coursework VLSI Design / Lab VLSI Testing Design / Lab Trust Integrated Circuit Design RF Power Amplifiers / Lab Modern Control Continue ... - 2018 Mar 06
... September 2010 to June 2014 Dalian Jiao Tong University Information Technology Institute - Dalian, China Related Coursework VLSI Design / Lab VLSI Testing Design / Lab Trust Integrated Circuit Design RF Power Amplifiers / Lab Modern Control Continue ... - 2018 Mar 06
Digital Design Verification Engineer
Temecula, CA
MOONISHA DHAMOTHARAN 408-***-**** • ac2dny@r.postjobfree.com PROFESSIONAL SUMMARY Expertise in VLSI Design and Verification with competent experience on ASIC IP. Proficient in Verilog and System Verilog languages and UVM and OVM methodology for ASIC ... - 2017 Sep 19
MOONISHA DHAMOTHARAN 408-***-**** • ac2dny@r.postjobfree.com PROFESSIONAL SUMMARY Expertise in VLSI Design and Verification with competent experience on ASIC IP. Proficient in Verilog and System Verilog languages and UVM and OVM methodology for ASIC ... - 2017 Sep 19
Electrical Engineering Design
Riverside, CA
... RELEVANT ACADEMIC WORK Robotics Certified Workshop, Rajiv Gandhi Institute of Technology, Mumbai (Feb 2012) Online course: Quantum Computing UC, Berkeley (Feb 2013) Nano VLSI and Intermediate VLSI Program, Atkom InfoTech (Oct 2012-May 2013) Embedded ... - 2015 May 25
... RELEVANT ACADEMIC WORK Robotics Certified Workshop, Rajiv Gandhi Institute of Technology, Mumbai (Feb 2012) Online course: Quantum Computing UC, Berkeley (Feb 2013) Nano VLSI and Intermediate VLSI Program, Atkom InfoTech (Oct 2012-May 2013) Embedded ... - 2015 May 25
Engineering Design
Riverside, CA
... His research interests include VLSI Design, computer architecture, embedded systemsdesign, and EDA. Thursday, Sept. 25, 2008, CPE 2.220, 4:00 PM- 5:30PM http://www.cerc.utexas.edu/vlsi-seminar/Novel Powermanagement for CMP Systems in Data-intensive ... - 2013 Feb 17
... His research interests include VLSI Design, computer architecture, embedded systemsdesign, and EDA. Thursday, Sept. 25, 2008, CPE 2.220, 4:00 PM- 5:30PM http://www.cerc.utexas.edu/vlsi-seminar/Novel Powermanagement for CMP Systems in Data-intensive ... - 2013 Feb 17
Engineer Manager
Laguna Hills, CA, 92653
... VLSI Technology, San Antonio, TX SRAM Process Integration Engineer, September 1998 to August 1990 Translated and interpreted Japanese technical documents in Hitachi SRAM transfer to the San Antonio wafer fab. . Played key role in WSi poly gate ... - 2011 Apr 21
... VLSI Technology, San Antonio, TX SRAM Process Integration Engineer, September 1998 to August 1990 Translated and interpreted Japanese technical documents in Hitachi SRAM transfer to the San Antonio wafer fab. . Played key role in WSi poly gate ... - 2011 Apr 21
Manager Project
Rancho Santa Margarita, CA, 92688
... Served as the Hardware Consultant for OEM partners and our internal software lab 06/96 - 06/97 VLSI Technology ASIC Design & Verification Engineer . Designed and verified specific blocks of a 10/100 Ethernet MAC using Verilog . Began Design on a 10 ... - 2011 Apr 02
... Served as the Hardware Consultant for OEM partners and our internal software lab 06/96 - 06/97 VLSI Technology ASIC Design & Verification Engineer . Designed and verified specific blocks of a 10/100 Ethernet MAC using Verilog . Began Design on a 10 ... - 2011 Apr 02
Engineer Manager
Temecula, CA, 92593
... Education Continuing Education Courses in Digital Design, Fiber Optics, VLSI Design, Advanced Math, C and Visual Basic Programming, Aviation, and Japanese Language. Classes and seminars in Business, Finance and Investments. Rensselaer Polytechnic ... - 2010 Mar 09
... Education Continuing Education Courses in Digital Design, Fiber Optics, VLSI Design, Advanced Math, C and Visual Basic Programming, Aviation, and Japanese Language. Classes and seminars in Business, Finance and Investments. Rensselaer Polytechnic ... - 2010 Mar 09