| Distance: | Resume alert | Resumes 291 - 300 of 6077 |
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Troy, MI
... with Linux/Unix, and MAC OS X system administration Familiar with version control systems for software development Proficient with cloud platforms: Amazon AWS and Microsoft Azure Programming Languages: C/C++, VHDL, Verilog, Python, BASH, PowerShell. ... - 2024 Feb 27
... with Linux/Unix, and MAC OS X system administration Familiar with version control systems for software development Proficient with cloud platforms: Amazon AWS and Microsoft Azure Programming Languages: C/C++, VHDL, Verilog, Python, BASH, PowerShell. ... - 2024 Feb 27
Software Engineer C#
Gresham, OR
... Bourquin Portland, OR · 503-***-**** · **********@*****.*** Technology: Development: Eclipse, Xcode, Visual Studio, RAD Studio, Android Studio, Eagle (PCB) Language: Objective-C, Java, C, C++, C# OOD/OOP, Python, Verilog, VHDL, LVS, NLE Hardware: ... - 2024 Feb 26
... Bourquin Portland, OR · 503-***-**** · **********@*****.*** Technology: Development: Eclipse, Xcode, Visual Studio, RAD Studio, Android Studio, Eagle (PCB) Language: Objective-C, Java, C, C++, C# OOD/OOP, Python, Verilog, VHDL, LVS, NLE Hardware: ... - 2024 Feb 26
C++, C, Java, Python, Web Application
Durham, NC
... Zhang, “Research on Comparator Design Techniques”, 2021 6th International Conference on Mechanical, Control and Computer Engineering, Sanya, China SKILLS • Programming Language: C++, C, Python, Java, Rust, HTML, CSS, JavaScript, SQL, Verilog, MATLAB ... - 2024 Feb 26
... Zhang, “Research on Comparator Design Techniques”, 2021 6th International Conference on Mechanical, Control and Computer Engineering, Sanya, China SKILLS • Programming Language: C++, C, Python, Java, Rust, HTML, CSS, JavaScript, SQL, Verilog, MATLAB ... - 2024 Feb 26
Test Engineer Computer Engineering
Los Angeles, CA
... Wireless Research Center - Berkeley, CA June 2004 to September 2004 Designed and Implemented a Finite Impulse Response Filter using Matlab Simulink and Verilog, on a Virtex 2 FPGA to improve the speed of Sigma-Delta analog to digital converters. ... - 2024 Feb 24
... Wireless Research Center - Berkeley, CA June 2004 to September 2004 Designed and Implemented a Finite Impulse Response Filter using Matlab Simulink and Verilog, on a Virtex 2 FPGA to improve the speed of Sigma-Delta analog to digital converters. ... - 2024 Feb 24
Software Engineer Development
Boston, MA, 02109
... 2011-2012 Advanced Micro Devices, Boston Development Center, Boxborough, MA Software Engineer Supported validation of the Verilog implementation of standard encryption algorithms Extended and debugged Design Verification Environment implemented in C ... - 2024 Feb 22
... 2011-2012 Advanced Micro Devices, Boston Development Center, Boxborough, MA Software Engineer Supported validation of the Verilog implementation of standard encryption algorithms Extended and debugged Design Verification Environment implemented in C ... - 2024 Feb 22
Mixed Signal Verification Engineer
Santa Clara, CA, 95050
... Behavioral modeling of Power management analog blocks primarily in Verilog-AMS, SystemVerilog-RNM and VHDL-RNM. Top-level simulations, Analog-Digital Co-simulations (AMS) to verify analog modules from top-level. Experience in SystemVerilog-UVM Test ... - 2024 Feb 21
... Behavioral modeling of Power management analog blocks primarily in Verilog-AMS, SystemVerilog-RNM and VHDL-RNM. Top-level simulations, Analog-Digital Co-simulations (AMS) to verify analog modules from top-level. Experience in SystemVerilog-UVM Test ... - 2024 Feb 21
Electrical Engineer Engineering
Laval, QC, Canada
... (Also used the ‘ABEL’ programming language and some knowledge of Verilog). Good experience creating state numerous machines, dual clock domain FIFOs, camera control, PCI arbitrator, DSP and CPU memory interfaces, serial bus interfaces, I/O registers ... - 2024 Feb 21
... (Also used the ‘ABEL’ programming language and some knowledge of Verilog). Good experience creating state numerous machines, dual clock domain FIFOs, camera control, PCI arbitrator, DSP and CPU memory interfaces, serial bus interfaces, I/O registers ... - 2024 Feb 21
C# Software Developer
Clermont, FL
... English Programming Languages and Skills: C#, C, C++, Python, HTML, CSS, APEX, Assembly, SQL, JavaScript, Unreal Engine 5, Cesium, Blender, Houdini, AirSim, RenderDoc, Machine Learning, VHDL, Verilog, Word, Excel, Computer Science, and PowerPoint. ... - 2024 Feb 21
... English Programming Languages and Skills: C#, C, C++, Python, HTML, CSS, APEX, Assembly, SQL, JavaScript, Unreal Engine 5, Cesium, Blender, Houdini, AirSim, RenderDoc, Machine Learning, VHDL, Verilog, Word, Excel, Computer Science, and PowerPoint. ... - 2024 Feb 21
Electrical Engineer Engineering
Glendale, CA
... in Air Defense Science (Radar and Missile Systems) 1989 – 1993 Air Defense College, Alexandria, Egypt PROFESSIONAL SKILLS • • Programming: Assembly, JAVA, C/C++, and Python Proficient with: ASIC, Verilog HDL, VHDL, Altium Designer, Cadence Allegro ... - 2024 Feb 20
... in Air Defense Science (Radar and Missile Systems) 1989 – 1993 Air Defense College, Alexandria, Egypt PROFESSIONAL SKILLS • • Programming: Assembly, JAVA, C/C++, and Python Proficient with: ASIC, Verilog HDL, VHDL, Altium Designer, Cadence Allegro ... - 2024 Feb 20
Circuit Design Mixed Signal
College Station, TX
... Engineering GPA: 8.54/10.00 Coursework: Analog Integrated Circuit design, RFIC, DSP, Analog/Mixed Mode VLSI Design, VHDL and Verilog Digital design, Digital VLSI design, Wireless Communications SKILLS: Design tools & Programming: Cadence Virtuoso ... - 2024 Feb 15
... Engineering GPA: 8.54/10.00 Coursework: Analog Integrated Circuit design, RFIC, DSP, Analog/Mixed Mode VLSI Design, VHDL and Verilog Digital design, Digital VLSI design, Wireless Communications SKILLS: Design tools & Programming: Cadence Virtuoso ... - 2024 Feb 15