| Distance: | Resume alert | Resumes 291 - 300 of 5927 |
Engineering Intern Pcb Layout
Ho Chi Minh City, Vietnam
... • Programming : C++, C#, Python, VHDL, Verilog, Assembly, Linux. • Nonlinear Control: Increase device stability in practice. • Intergrated Circuit: Components and operration. PROJECTS SMART IOT BOARD FOR HOME AUTOMATION // OCT 2022 - DEC 2022 ... - 2024 May 02
... • Programming : C++, C#, Python, VHDL, Verilog, Assembly, Linux. • Nonlinear Control: Increase device stability in practice. • Intergrated Circuit: Components and operration. PROJECTS SMART IOT BOARD FOR HOME AUTOMATION // OCT 2022 - DEC 2022 ... - 2024 May 02
Embedded Systems Engineer
Kitchener, ON, Canada
SOFTWARE AutoCAD Eagle/Altium PSpice VHDL/Verilog Java MATLAB Revit JavaScript Revit C KiCad Arduino IDE Zephyr FreeRTOS Python CONTACT Primary address: Waterloo, ON Secondary address: Windsor, ON Phone: 226-***-**** E-Mail: ******.**********@*****. ... - 2024 Apr 29
SOFTWARE AutoCAD Eagle/Altium PSpice VHDL/Verilog Java MATLAB Revit JavaScript Revit C KiCad Arduino IDE Zephyr FreeRTOS Python CONTACT Primary address: Waterloo, ON Secondary address: Windsor, ON Phone: 226-***-**** E-Mail: ******.**********@*****. ... - 2024 Apr 29
Ic Design Automation
Cedar Park, TX
... •IC design netlist translation, pre-processing, format exchange/flow integration/extraction between LEF/DEF/EDIF/SDF/SPF/CDL/Spice/YAML/Verilog/database/internal netlist/constraint parsing and generation/library mapping. •EDA logic/physical database ... - 2024 Apr 27
... •IC design netlist translation, pre-processing, format exchange/flow integration/extraction between LEF/DEF/EDIF/SDF/SPF/CDL/Spice/YAML/Verilog/database/internal netlist/constraint parsing and generation/library mapping. •EDA logic/physical database ... - 2024 Apr 27
Computer Vision Machine Learning
Quan 1, 71000, Vietnam
... WORK EXPERIENCE Apr 2019 - Jul 2019 ADTECHNOLOGY & SNST VIET NAM TRAINEE • I have been trained SoC (System on Chip) Design flow, Logic design and simulation (Verilog). • Synthesis with Synopsys DC (Design Compiler) Workshop. • STA with Synopsys ... - 2024 Apr 24
... WORK EXPERIENCE Apr 2019 - Jul 2019 ADTECHNOLOGY & SNST VIET NAM TRAINEE • I have been trained SoC (System on Chip) Design flow, Logic design and simulation (Verilog). • Synthesis with Synopsys DC (Design Compiler) Workshop. • STA with Synopsys ... - 2024 Apr 24
Software Engineer Embedded
San Jose, CA
... Familiar with Verilog-HDL, synthesis, timing and logic verification. Much experience of C/C++ based embedded code development for SoC-level verification. Highlight • SoC level module integration and verification. Developed and maintained the test ... - 2024 Apr 23
... Familiar with Verilog-HDL, synthesis, timing and logic verification. Much experience of C/C++ based embedded code development for SoC-level verification. Highlight • SoC level module integration and verification. Developed and maintained the test ... - 2024 Apr 23
Computer Engineering C++
Murphy, TX, 75094
... College’s Dean’s List from Fall 2018 – 2019 TECHNICAL SKILLS Programming Languages: C, C++, Java, Python, JavaScript, and Verilog Software and Framework: Rest API, SOAP API, Angular, Splunk, Unix/Linux, Eclipse, Visual Studio, IntelliJ, Cadence ... - 2024 Apr 23
... College’s Dean’s List from Fall 2018 – 2019 TECHNICAL SKILLS Programming Languages: C, C++, Java, Python, JavaScript, and Verilog Software and Framework: Rest API, SOAP API, Angular, Splunk, Unix/Linux, Eclipse, Visual Studio, IntelliJ, Cadence ... - 2024 Apr 23
Information Technology Computer Science
Quan 1, 71000, Vietnam
... CERTIFICATE Computational Thinking for Problem Solving - Coursera Thu Duc, Ho Chi Minh City 037*-***-*** ************@*****.*** Hàn Phi Trường AI Engineer EDUCATION SKILLS Programming Languages: Verilog, System Verilog, C++, SQL, Python, C#, HTML ... - 2024 Apr 23
... CERTIFICATE Computational Thinking for Problem Solving - Coursera Thu Duc, Ho Chi Minh City 037*-***-*** ************@*****.*** Hàn Phi Trường AI Engineer EDUCATION SKILLS Programming Languages: Verilog, System Verilog, C++, SQL, Python, C#, HTML ... - 2024 Apr 23
ASIC Design Engineer Intern
Quan 1, 710000, Vietnam
... • VLSI, Verilog, Digital System. • IoTs, AI-Machine learning. FAVORITE • Reading book, Running. • Sport: Football, Badminton, Volleyball. • RTL design – Code Verilog. RESEARCH GOALS Take advantages of my own experience and knowledge at the ... - 2024 Apr 22
... • VLSI, Verilog, Digital System. • IoTs, AI-Machine learning. FAVORITE • Reading book, Running. • Sport: Football, Badminton, Volleyball. • RTL design – Code Verilog. RESEARCH GOALS Take advantages of my own experience and knowledge at the ... - 2024 Apr 22
Electrical Engineer Product Development
Taunton, MA
... Design and verification with Verilog/VHDL and System Verilog for FPGAs. EMC and electrical safety design and testing for IEC60601-1 compliance Lead verification and validation of systems. Interface with cross functional stakeholders to coordinate ... - 2024 Apr 21
... Design and verification with Verilog/VHDL and System Verilog for FPGAs. EMC and electrical safety design and testing for IEC60601-1 compliance Lead verification and validation of systems. Interface with cross functional stakeholders to coordinate ... - 2024 Apr 21
Design Verification Engineer
Sunnyvale, CA
Lushan Liu 408-***-**** *********@*****.*** SKILLS Assembly, Verilog, SystemC, SystemVerilog, UVM, Cadence JasperGold, IMC coverage, C/C++, Java, Perl/Python, C Shell scripts, MakeFile Cadence Xcelium, Virtuoso, AMS, SPICE, Spectre, Verdi, SimVision ... - 2024 Apr 17
Lushan Liu 408-***-**** *********@*****.*** SKILLS Assembly, Verilog, SystemC, SystemVerilog, UVM, Cadence JasperGold, IMC coverage, C/C++, Java, Perl/Python, C Shell scripts, MakeFile Cadence Xcelium, Virtuoso, AMS, SPICE, Spectre, Verdi, SimVision ... - 2024 Apr 17