| Resume alert | Resumes 91 - 100 of 108 |
Electrical Engineer
Anaheim, CA, 92804
... EDUCATION: California Polytechnic University, Pomona Pomona, CA Bachelor of Science in Electrical Engineering, January 2010 CPP G.P.A: 3.0/4.0 Courses taken included: • Robotics Electronics • Advance Control Systems • C/C++/Verilog/Assembly ... - 2011 Apr 21
... EDUCATION: California Polytechnic University, Pomona Pomona, CA Bachelor of Science in Electrical Engineering, January 2010 CPP G.P.A: 3.0/4.0 Courses taken included: • Robotics Electronics • Advance Control Systems • C/C++/Verilog/Assembly ... - 2011 Apr 21
Manager Project
Rancho Santa Margarita, CA, 92688
... Designed and verified specific blocks of a 10/100 Ethernet MAC using Verilog . Began Design on a 10/100/1000 (gigabit) Ethernet MAC . Verified and characterized ATM SAR Chips 01/95 - 09/95 Bay Networks Board Design & Test Engineer . Designed and ... - 2011 Apr 02
... Designed and verified specific blocks of a 10/100 Ethernet MAC using Verilog . Began Design on a 10/100/1000 (gigabit) Ethernet MAC . Verified and characterized ATM SAR Chips 01/95 - 09/95 Bay Networks Board Design & Test Engineer . Designed and ... - 2011 Apr 02
Project Engineer / Project Manager in Robotics Software Engineering
Irvine, CA
... • Control and Electronics: Robotics and AI, Embedded systems, Communication, Verilog HDL. • Programming Languages: C/C++, Python, LabView. • Web Development: (X)HTML / CSS / JavaScript. • Administration: Linux, Windows, IP Networks, Internet-based ... - 2011 Mar 06
... • Control and Electronics: Robotics and AI, Embedded systems, Communication, Verilog HDL. • Programming Languages: C/C++, Python, LabView. • Web Development: (X)HTML / CSS / JavaScript. • Administration: Linux, Windows, IP Networks, Internet-based ... - 2011 Mar 06
Electrical Engineer Assistant
Irvine, CA, 92604
... Received Georgia Tech President's Undergraduate Research Award Spring 2005 Jan.-Aug'03 Research Assistant Synthesized Verilog code for C499 circuit using Synopsis Routed synthesized design using Silicon Ensemble Received Georgia Tech President's ... - 2010 Nov 14
... Received Georgia Tech President's Undergraduate Research Award Spring 2005 Jan.-Aug'03 Research Assistant Synthesized Verilog code for C499 circuit using Synopsis Routed synthesized design using Silicon Ensemble Received Georgia Tech President's ... - 2010 Nov 14
Manager Development
Redondo Beach, CA, 90277
... Pricing and manufacturing cost trade offs and Asian sourcing o Inventory and forecasting, PSI (supply and Demand) inventory performance o Software Microsoft Office Suite, Visio, Project, Verilog (HDL Beginner), Understanding Autodesk Maya capability - 2010 Nov 04
... Pricing and manufacturing cost trade offs and Asian sourcing o Inventory and forecasting, PSI (supply and Demand) inventory performance o Software Microsoft Office Suite, Visio, Project, Verilog (HDL Beginner), Understanding Autodesk Maya capability - 2010 Nov 04
Engineer Design
Garden Grove, CA, 92840
... TECHNICAL DESIGN SKILLS Synopsys Design Compiler and Prime Time, VHDL, Verilog HDL Spyglass CDC, Power estimation, reduction and verification, Formal verification, C/C++ programming and assembly language, Modelsim, Ncsim, QuickVHDL, SILOS3 Simulator ... - 2010 Oct 25
... TECHNICAL DESIGN SKILLS Synopsys Design Compiler and Prime Time, VHDL, Verilog HDL Spyglass CDC, Power estimation, reduction and verification, Formal verification, C/C++ programming and assembly language, Modelsim, Ncsim, QuickVHDL, SILOS3 Simulator ... - 2010 Oct 25
Software Engineer Management
Torrance, CA, 90504
... Proficient in JOVIAL, Assembly, C++, Java, Verilog HDL, VHDL. EMPLOYMENT HISTORY . Northrop Grumman Information Systems: June, 2008 - present - Software engineer in Redondo Beach, California. - Working on Milstar satellite communications payload, ... - 2010 Oct 18
... Proficient in JOVIAL, Assembly, C++, Java, Verilog HDL, VHDL. EMPLOYMENT HISTORY . Northrop Grumman Information Systems: June, 2008 - present - Software engineer in Redondo Beach, California. - Working on Milstar satellite communications payload, ... - 2010 Oct 18
Design Engineering
Long Beach, CA, 90815
... Hardware design using Verilog HDL, Implementation and behavioral simulation, Problem solving by using state diagram representation. Hardware design using VHDL, Implementation and behavioral simulation. C programming and problem solving, object ... - 2010 Sep 10
... Hardware design using Verilog HDL, Implementation and behavioral simulation, Problem solving by using state diagram representation. Hardware design using VHDL, Implementation and behavioral simulation. C programming and problem solving, object ... - 2010 Sep 10
Engineer Six Sigma
Rowland Heights, CA, 91748
... Languages: Labview, C, Visual Basics, Motorola Assembly, VHDL, Verilog . Design Tools: View Logic, OrCAD, pSpice, Labwiew, Altera Quartus II, Code V Professional Experience XEROX CORPORATION, El Segundo, CA 2002 to 2010 Xerox Image Delivery Center ... - 2010 Sep 01
... Languages: Labview, C, Visual Basics, Motorola Assembly, VHDL, Verilog . Design Tools: View Logic, OrCAD, pSpice, Labwiew, Altera Quartus II, Code V Professional Experience XEROX CORPORATION, El Segundo, CA 2002 to 2010 Xerox Image Delivery Center ... - 2010 Sep 01
Software Engineer Electrical
Torrance, CA, 90504
... Languages: C, C++, Verilog, Assembly, Jovial. . CAD tools: Cadence, PSPICE, HPSICE, Quartus. . Software: Matlab, Visual Studio, Microsoft Word, Excel, Access, and Powerpoint. . Operating systems: UNIX, VAX. Awards . Eagle Scout, Boy Scouts of ... - 2010 Aug 26
... Languages: C, C++, Verilog, Assembly, Jovial. . CAD tools: Cadence, PSPICE, HPSICE, Quartus. . Software: Matlab, Visual Studio, Microsoft Word, Excel, Access, and Powerpoint. . Operating systems: UNIX, VAX. Awards . Eagle Scout, Boy Scouts of ... - 2010 Aug 26