| Distance: | Resume alert | Resumes 21 - 30 of 727 |
Mysore Collage
Vasant Nagar, Karnataka, India
... Swamy Vivekananda pu collage mysore State Board 2017 72% SSLC – Little angle school hutti gold mines State Board 2015 80% AREAS OF INTERESTS •Programming in C, C++, Core java CERTIFICATIONS: •VLSI Design using Verilog HDL-Webinar by MAVEN silicon. ... - 2021 May 24
... Swamy Vivekananda pu collage mysore State Board 2017 72% SSLC – Little angle school hutti gold mines State Board 2015 80% AREAS OF INTERESTS •Programming in C, C++, Core java CERTIFICATIONS: •VLSI Design using Verilog HDL-Webinar by MAVEN silicon. ... - 2021 May 24
Mysore Internship
Vasant Nagar, Karnataka, India
... TECHNICAL SKILLS: Programming languages: C,C++,Python, Core java, Verilog, VHDL Web technologies: HTML Microsof technologies: Azure CO - CURRICULAR ACTIVITIES : I was partcipated in “2nd south India project exhibiton” at Tiptur. Attended 4th Natonal ... - 2021 May 24
... TECHNICAL SKILLS: Programming languages: C,C++,Python, Core java, Verilog, VHDL Web technologies: HTML Microsof technologies: Azure CO - CURRICULAR ACTIVITIES : I was partcipated in “2nd south India project exhibiton” at Tiptur. Attended 4th Natonal ... - 2021 May 24
Public School Ece
Vasant Nagar, Karnataka, India
... projects ●Automatic domestic waste segregator Technical Skills: ●Programming skills: Basic knowledge of C,C++, Matlab,Verilog,arudino ide Strengths: ●Good communication skills ●Leadership quality ●Good grasping ability ●Hard working ●Dedicated ... - 2021 May 24
... projects ●Automatic domestic waste segregator Technical Skills: ●Programming skills: Basic knowledge of C,C++, Matlab,Verilog,arudino ide Strengths: ●Good communication skills ●Leadership quality ●Good grasping ability ●Hard working ●Dedicated ... - 2021 May 24
Internship Girl
Bangalore, Karnataka, India
... Verilog HDL Basics of PYTHON VLSI Skill Set: • Extrovert and comfortable in new environment. • Good communication and presentation skills Education: Secondary School Leaving Certificate Shree Sharada Girl’s High School, Ron Percentage: 80 % Pre ... - 2021 May 16
... Verilog HDL Basics of PYTHON VLSI Skill Set: • Extrovert and comfortable in new environment. • Good communication and presentation skills Education: Secondary School Leaving Certificate Shree Sharada Girl’s High School, Ron Percentage: 80 % Pre ... - 2021 May 16
Project Telugu
Vasant Nagar, Karnataka, India
... Software proficiency: ● Verilog HDL. ● MS-office. ● LINUX operating system. Personal Strengths: ● Able to work independently and as a part of team, with a high degree of integration. ● Resourceful and a good solution provider with an excellent ... - 2021 May 15
... Software proficiency: ● Verilog HDL. ● MS-office. ● LINUX operating system. Personal Strengths: ● Able to work independently and as a part of team, with a high degree of integration. ● Resourceful and a good solution provider with an excellent ... - 2021 May 15
C C++ java SQL Verilog HDL
Bangalore, Karnataka, India
... Verilog HDL. Basics of JAVA and PYTHON . (Currently pursuing Full Stack JAVA Certification course from Capgemini Technoserve C2TC Program) 2. Practical knowledge of MICROSOFT OFFICE 3. Design Tools: Solid Edge 4. Knowledge of IOT 5. Possess ... - 2021 May 14
... Verilog HDL. Basics of JAVA and PYTHON . (Currently pursuing Full Stack JAVA Certification course from Capgemini Technoserve C2TC Program) 2. Practical knowledge of MICROSOFT OFFICE 3. Design Tools: Solid Edge 4. Knowledge of IOT 5. Possess ... - 2021 May 14
Trainee Software Engineer,-C/C++& OOPs concept, HTML, JavaScript, Java
Vasant Nagar, Karnataka, India
... • Done internship at Semi-Conductors Laboratory and E&ICT Academy IIT Guwahati on Digital VLSI in Verilog Hardware Description Language. Duration: 4 months. • Done certification in Texas instruments for courses linear integrated circuits and ... - 2021 May 14
... • Done internship at Semi-Conductors Laboratory and E&ICT Academy IIT Guwahati on Digital VLSI in Verilog Hardware Description Language. Duration: 4 months. • Done certification in Texas instruments for courses linear integrated circuits and ... - 2021 May 14
Internship Java
Bangalore, Karnataka, India
... Good knowledge about Verilog Coding. Ongoing Java,SQL, Python course. Internship and project details : Completed Online Internship Program on DESIGN AND VERIFICATION USING VERILOG. Final year on going project on BIDIRECTIONAL AUTOMATIC RAILWAY GATE ... - 2021 May 14
... Good knowledge about Verilog Coding. Ongoing Java,SQL, Python course. Internship and project details : Completed Online Internship Program on DESIGN AND VERIFICATION USING VERILOG. Final year on going project on BIDIRECTIONAL AUTOMATIC RAILWAY GATE ... - 2021 May 14
Internship Embedded
Vasant Nagar, Karnataka, India
... Education Nirmala convent SSLC 85.46% Vidhya Vardhaka college PUC 74.26% Sri Krishna Institute of Technology B E Internship Completed 1-month internship in Entuple Technologies, on the topic Design And Verification Using Verilog Achievements & Awards ... - 2021 May 14
... Education Nirmala convent SSLC 85.46% Vidhya Vardhaka college PUC 74.26% Sri Krishna Institute of Technology B E Internship Completed 1-month internship in Entuple Technologies, on the topic Design And Verification Using Verilog Achievements & Awards ... - 2021 May 14
Trainee Embedded
Bangalore, Karnataka, India
... ACADEMIC PROJECTS 1.Design and Implementation of Efficient AES Algorithm Using HDL HDL : Verilog Tool : Xilinx ISE, MODELSIM Hardware: Artix 7 FPGA The high speed implementation of AES architecture is achieved Pipelining and LUT based Architecture. ... - 2021 May 13
... ACADEMIC PROJECTS 1.Design and Implementation of Efficient AES Algorithm Using HDL HDL : Verilog Tool : Xilinx ISE, MODELSIM Hardware: Artix 7 FPGA The high speed implementation of AES architecture is achieved Pipelining and LUT based Architecture. ... - 2021 May 13