| Resume alert | Resumes 21 - 30 of 119 |
Engineer Design
Noida, Uttar Pradesh, India
... ● Eagle ● MATLAB ● XILINX ISE 10.1 Microcontrollers ● Arduino ● AVR ● STM32 Boards ● Raspberry Pi ● FPGA(BASYS 2) Online Course July, 2017 - Sep, 2017 IISc Bangalore, organised by NPTEL ● Based on the designing procedure for the Internet of things. ... - 2019 Oct 13
... ● Eagle ● MATLAB ● XILINX ISE 10.1 Microcontrollers ● Arduino ● AVR ● STM32 Boards ● Raspberry Pi ● FPGA(BASYS 2) Online Course July, 2017 - Sep, 2017 IISc Bangalore, organised by NPTEL ● Based on the designing procedure for the Internet of things. ... - 2019 Oct 13
Executive Design
Gurgaon, Haryana, India
... Monitoring System” • Worked on research paper “Perovskites based Solar Cells” • Designed a Street Light System using FPGA to reduce the Power Consumption and enhance efficiency • Designed a hand gesture-controlled robot using flex sensors and ... - 2019 Oct 12
... Monitoring System” • Worked on research paper “Perovskites based Solar Cells” • Designed a Street Light System using FPGA to reduce the Power Consumption and enhance efficiency • Designed a hand gesture-controlled robot using flex sensors and ... - 2019 Oct 12
Design Project
Noida, Uttar Pradesh, 201304, India
... The top level design of simx16M-7 contains FPGA, ASIC, CPLD,PHY and EEPROM. My Task- Design schematic(ORCAD Capture), create net list file,Generate BOM. Boundary scan chain from schematic /Automatic test development & debugging (inter,infra,cluster ... - 2019 Sep 13
... The top level design of simx16M-7 contains FPGA, ASIC, CPLD,PHY and EEPROM. My Task- Design schematic(ORCAD Capture), create net list file,Generate BOM. Boundary scan chain from schematic /Automatic test development & debugging (inter,infra,cluster ... - 2019 Sep 13
Physics Faculty
Noida, Uttar Pradesh, India
... TECHNICAL SKILLS: Fields of Interest : IB Physics, Semiconductor, VLSI, Digital Electronics Languages Known : C, C++, Python, and Perl FPGA : VHDL and Verilog Design Tools : MATLAB, Virtuoso, Xilinx, Keil, LTspice, Eldo Degree University/Board ... - 2019 Jun 24
... TECHNICAL SKILLS: Fields of Interest : IB Physics, Semiconductor, VLSI, Digital Electronics Languages Known : C, C++, Python, and Perl FPGA : VHDL and Verilog Design Tools : MATLAB, Virtuoso, Xilinx, Keil, LTspice, Eldo Degree University/Board ... - 2019 Jun 24
VLSI, Verilog, Data analytics, internship at ONGC
New Delhi, Delhi, 110075, India
... Gained hands-on experience in working with Field Programmable Gate Array (FPGA) implementation of digital electronic models. Special Interest Group (SIG) Participant at IEEE IGDTUW [4 weeks, March 2017 - April 2017]: Participated in a SIG on Cloud ... - 2018 Oct 27
... Gained hands-on experience in working with Field Programmable Gate Array (FPGA) implementation of digital electronic models. Special Interest Group (SIG) Participant at IEEE IGDTUW [4 weeks, March 2017 - April 2017]: Participated in a SIG on Cloud ... - 2018 Oct 27
Industrial Training Project
New Delhi, Delhi, India
... TECHNICAL SKILLS Programming Language: C, VHDL, Verilog HDL Tools Used: Quartus II, Vivado 2016.4, Matlab, Matlab Simulink, Vivado SDK, Xilinx Microblaze, LabVIEW Devices Used: BASYS3 FPGA, Raspberry Pi 3, Arduino, Some Sensors ACHIEVEMENTS Secured ... - 2018 Jul 29
... TECHNICAL SKILLS Programming Language: C, VHDL, Verilog HDL Tools Used: Quartus II, Vivado 2016.4, Matlab, Matlab Simulink, Vivado SDK, Xilinx Microblaze, LabVIEW Devices Used: BASYS3 FPGA, Raspberry Pi 3, Arduino, Some Sensors ACHIEVEMENTS Secured ... - 2018 Jul 29
Fresher
New Delhi, DL, India
... Design and Implementation of UART using VHDL (using Xilinx ISE and FPGA Board) Design, synthesize and simlulate the code for UART in VHDL on Xilinx ISE. Further implemented the code by using JTAG on SPARTAN 3E on FPGA Board. Design and ... - 2018 Jan 30
... Design and Implementation of UART using VHDL (using Xilinx ISE and FPGA Board) Design, synthesize and simlulate the code for UART in VHDL on Xilinx ISE. Further implemented the code by using JTAG on SPARTAN 3E on FPGA Board. Design and ... - 2018 Jan 30
Training Industrial
DL, India
... Shell Scripting Software Xilinx ISE, ModelSim, QuestaSim, Tina pro Operating System Linux (Ubuntu & mint) and Windows Languages Known English and Hindi Other skills FPGA, AVR studio, Arduino IDE, My sql, SUMMER INTERNSHIP / INDUSTRIAL TRAINING : 1. ... - 2017 Jul 30
... Shell Scripting Software Xilinx ISE, ModelSim, QuestaSim, Tina pro Operating System Linux (Ubuntu & mint) and Windows Languages Known English and Hindi Other skills FPGA, AVR studio, Arduino IDE, My sql, SUMMER INTERNSHIP / INDUSTRIAL TRAINING : 1. ... - 2017 Jul 30
Design Engineer
DL, India
... •FPGA Logic System Design. •Advance Workshop in Layout Design using Cadence – Virtuoso from ENTUPLE Technologies at IPEC TECHNICAL COMPETENCIES Languages Known - •Hardware Design:Verilog •Tools Used Design: Cadence-Virtuoso (VSEL, LayoutXL), Silvaco ... - 2017 Jun 19
... •FPGA Logic System Design. •Advance Workshop in Layout Design using Cadence – Virtuoso from ENTUPLE Technologies at IPEC TECHNICAL COMPETENCIES Languages Known - •Hardware Design:Verilog •Tools Used Design: Cadence-Virtuoso (VSEL, LayoutXL), Silvaco ... - 2017 Jun 19
Project Data
DL, India
... Minor project: FPGA implementation of UART using verilog hardware description language. 2. B.TECH. Door Locks Security System by Image Processing Using (Mat Lab) Description: In our project face recognition technique is used for security lock in ... - 2017 Jun 13
... Minor project: FPGA implementation of UART using verilog hardware description language. 2. B.TECH. Door Locks Security System by Image Processing Using (Mat Lab) Description: In our project face recognition technique is used for security lock in ... - 2017 Jun 13