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Design Verification Engineer-UVM,SV, RTL design engineer-Verilog, STA resume in Kingsville, TX - December 2020

Arun Raja Manjini

**********@*****.*** 361-***-**** Kingsville, TX-78363 linkedin.com/in/arunrjm/ github.com/aaronrjmanj EDUCATION

M.S., in Electrical Engineering Texas A&M University, TX, US Aug 2019 – May 2021 GPA: 4/4 B.Tech., in Electronics & Communication Pondicherry University, India...


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