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ASIC design verification engineer resume in Los Angeles, CA - August 2017

Vignesh Saravanan

ac1q5u@r.postjobfree.com

SOFTWARE SKILLS

EDA TOOLS –

Cadence Encounter

RTL compiler ultra

Cadence Virtuoso

Mentor graphics IC station

Mentor graphics Calibre

Leonardo Spectrum

Model sim

Synopsys primetime

Altera Quartus II

Xilinx ISE

Xilinx Vivado

OPERATING SYSTEM-

Linux,...


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