| Resume alert | Resumes 1 - 10 of 5213 |
Scrum Master C++
Minneapolis, MN, 55415
... Adv SW Engineer/Systems Engineer General Dynamics Bloomington, MN Design solutions to provide high speed communications from an FPGA system to a Linux system to allow real-time software interrupts. Provide a full IP solution to the backplane of an ... - May 23
... Adv SW Engineer/Systems Engineer General Dynamics Bloomington, MN Design solutions to provide high speed communications from an FPGA system to a Linux system to allow real-time software interrupts. Provide a full IP solution to the backplane of an ... - May 23
Design Engineer Hardware
Hyderabad, Telangana, India
... The controller is built on the DSP Controller & FPGA that calculates the velocity magnitude as per the designed algorithm and output in direction format to generatenecessary PWM Signals which are optically isolated and buffered to drive the midgets ... - May 22
... The controller is built on the DSP Controller & FPGA that calculates the velocity magnitude as per the designed algorithm and output in direction format to generatenecessary PWM Signals which are optically isolated and buffered to drive the midgets ... - May 22
Business Development Project Management
Santa Clara, CA
... • 6.0KW, IGBT based, 32KV HVPS used to charge a 96 ηFD main storage capacitor banks • High voltage feedback, digitizing, and fiber optic conversion data modules (Manchester encoded) • Extensive PLD and FPGA design experience using Palasm and Cupl. ... - May 21
... • 6.0KW, IGBT based, 32KV HVPS used to charge a 96 ηFD main storage capacitor banks • High voltage feedback, digitizing, and fiber optic conversion data modules (Manchester encoded) • Extensive PLD and FPGA design experience using Palasm and Cupl. ... - May 21
Quality Control Team Members
Slidell, LA
... 1 Analog Circuit Design Analysis Digital Circuit Design Analysis Applied Differential Equations Projects: Image Processing with FPGA project(11/2019) VGA Controller and Memory project(9/2019) Microelectronic Research Experience Intern PROFESSIONAL ... - May 21
... 1 Analog Circuit Design Analysis Digital Circuit Design Analysis Applied Differential Equations Projects: Image Processing with FPGA project(11/2019) VGA Controller and Memory project(9/2019) Microelectronic Research Experience Intern PROFESSIONAL ... - May 21
Computer Engineering Embedded Systems
Arlington, TX
... Intel MAX10, Xilinx XUP Blackboard, Raspberry Pi 3, Arduino UNO, Tiva TM4C123GH6PM PROJECTS RISC-V Processor RISC-V, FPGA, SystemVerilog, Vivado, Assembly, Simulation • Designed a 5-stage-pipeline RISC-V SoC with data forwarding and control ... - May 20
... Intel MAX10, Xilinx XUP Blackboard, Raspberry Pi 3, Arduino UNO, Tiva TM4C123GH6PM PROJECTS RISC-V Processor RISC-V, FPGA, SystemVerilog, Vivado, Assembly, Simulation • Designed a 5-stage-pipeline RISC-V SoC with data forwarding and control ... - May 20
Electrical/ Electronics Design Product Development
Surrey, BC, Canada
... Tangible skills in BlueTooth, WiFi, CAD (most apps), GPS, Certification, uPC, RF, memory, USB, SPI, I2C, FPGA, Analog, Digital, Clocks, A / D, D / A, CAN bus, RS-xxx, PCB layout/design, Lithium Battery Management, Professional Audio Electronics, EV ... - May 18
... Tangible skills in BlueTooth, WiFi, CAD (most apps), GPS, Certification, uPC, RF, memory, USB, SPI, I2C, FPGA, Analog, Digital, Clocks, A / D, D / A, CAN bus, RS-xxx, PCB layout/design, Lithium Battery Management, Professional Audio Electronics, EV ... - May 18
Software Developer Senior
Manhattan, NY, 10019
... Java, HTML 5 and jQuery Angular js and Google App Engine (python), Angular UI on Cordova, particle.io photon IoT device FPGA Lattice Diamond VHDL / Verilog Blockchain: C++ BTC & BSV Bitcoin C++ Core, RSK + Solidity As for Cloud platforms I have ... - May 15
... Java, HTML 5 and jQuery Angular js and Google App Engine (python), Angular UI on Cordova, particle.io photon IoT device FPGA Lattice Diamond VHDL / Verilog Blockchain: C++ BTC & BSV Bitcoin C++ Core, RSK + Solidity As for Cloud platforms I have ... - May 15
Strategic business development director
Monterey, CA
... ● Prompt Engineering: perplexity Groq Labs LPU groqchat chatGPT bard/gemini copilot RTL auto generation ML Naval Applications for Machine Learning since 2016 ● ASIC FPGA DSP Analog circuit design ● UVM UVMF RTL HDL SV agent’s generator patterns ... - May 11
... ● Prompt Engineering: perplexity Groq Labs LPU groqchat chatGPT bard/gemini copilot RTL auto generation ML Naval Applications for Machine Learning since 2016 ● ASIC FPGA DSP Analog circuit design ● UVM UVMF RTL HDL SV agent’s generator patterns ... - May 11
Design Engineer Rtl
Phoenix, AZ
... robust immunity to a wide range of transient noise events ●Completed testbench scoreboard matrix demonstrating correct FPGA behavior across thousands of unique testpoints ●Presented verification results to Boeing as well as participate in weekly ... - May 09
... robust immunity to a wide range of transient noise events ●Completed testbench scoreboard matrix demonstrating correct FPGA behavior across thousands of unique testpoints ●Presented verification results to Boeing as well as participate in weekly ... - May 09
Electrical Engineering Data Analyst
Monroe, OH
... Languages: C, C++, VHDL, FPGA. Hardware:Oscilloscope, Circuit Boards, Function Generator. Project Thesis: "Smart Automobile with Innovative Features (Using Alcohole sensor, Fire Sensor, Gas Sensor, GSM Module, GPS Tracker)" Membership: ● Associate ... - May 05
... Languages: C, C++, VHDL, FPGA. Hardware:Oscilloscope, Circuit Boards, Function Generator. Project Thesis: "Smart Automobile with Innovative Features (Using Alcohole sensor, Fire Sensor, Gas Sensor, GSM Module, GPS Tracker)" Membership: ● Associate ... - May 05