| Distance: | Resume alert | Resumes 421 - 430 of 6051 |
Team Lead Rtl Design
Austin, TX
... Technical skills and Tools Very Good Coding Languages: Verilog HDL, VHDL, System Verilog, C Very Good ASIC/FPGA tools – Design compiler, Protocompiler, Spyglass CDC, Spyglass Lint,Model Sim, Questa sim, veloce,Lintra Lint, Questa CDC, Zebu compiler, ... - 2023 Jul 12
... Technical skills and Tools Very Good Coding Languages: Verilog HDL, VHDL, System Verilog, C Very Good ASIC/FPGA tools – Design compiler, Protocompiler, Spyglass CDC, Spyglass Lint,Model Sim, Questa sim, veloce,Lintra Lint, Questa CDC, Zebu compiler, ... - 2023 Jul 12
Computer Vision Deep Learning
Quan 1, 710000, Vietnam
... – 12/2022: Vision Intern EDUCATION HO CHI MINH CITY OF TECHNOLOGY (BACH KHOA) • 2019 - 2023 Control Engineering and Automation Talent Engineer Program GPA: 3.7/4.0 PROGRAMING LANGUAGES Python, C, C#, C++, Ladder, SQL, Assembly, Schematic, Verilog. ... - 2023 Jul 12
... – 12/2022: Vision Intern EDUCATION HO CHI MINH CITY OF TECHNOLOGY (BACH KHOA) • 2019 - 2023 Control Engineering and Automation Talent Engineer Program GPA: 3.7/4.0 PROGRAMING LANGUAGES Python, C, C#, C++, Ladder, SQL, Assembly, Schematic, Verilog. ... - 2023 Jul 12
Electrical Engineer Design
Frisco, TX
... Strong background in cutting-edge complex designs (system board, and ASIC/FPGAs in VHDL & Verilog). Expertise in Digital Design, Datacom/telecomm, CPLDs/FPGAs), simulation (System level), State Machines, DSPs, PLLs/DLLs (300MHz), and embedded ... - 2023 Jul 10
... Strong background in cutting-edge complex designs (system board, and ASIC/FPGAs in VHDL & Verilog). Expertise in Digital Design, Datacom/telecomm, CPLDs/FPGAs), simulation (System level), State Machines, DSPs, PLLs/DLLs (300MHz), and embedded ... - 2023 Jul 10
Electrical Engineering Technician
Denver, CO
... in Electrical Engineering Technology and Physics ABET accredited Programs ● Programming Languages: C/C++, Java, Python, Verilog Matlab, html ● Software: Multisim, Altera Quartus II (FPGA), Mathematica, MS Office Suite (Word, Excel, Powerpoint) ● ... - 2023 Jul 07
... in Electrical Engineering Technology and Physics ABET accredited Programs ● Programming Languages: C/C++, Java, Python, Verilog Matlab, html ● Software: Multisim, Altera Quartus II (FPGA), Mathematica, MS Office Suite (Word, Excel, Powerpoint) ● ... - 2023 Jul 07
Systems Engineer
Houston, TX
... TECHNICAL SKILLS ●Programming Languages: C++, C, Verilog, Basics of HTML. ●Software: Visual Studio, LabVIEW, Multisim, AutoCAD, MATLAB. ●Hardware: DAQ systems, Arduino, PCB, analog and Digital Circuit design. ●Experienced with designing, developing, ... - 2023 Jul 03
... TECHNICAL SKILLS ●Programming Languages: C++, C, Verilog, Basics of HTML. ●Software: Visual Studio, LabVIEW, Multisim, AutoCAD, MATLAB. ●Hardware: DAQ systems, Arduino, PCB, analog and Digital Circuit design. ●Experienced with designing, developing, ... - 2023 Jul 03
Computer Engineering Entry Level
Denver, CO
... knowledge of micro architecture and VHDL or verilog. Computer Software Engineering Developing software systems and applications for desktop, mobile, web, and cloud platforms. familiar with JAVA language (Object Oriented Programming. data structure, ... - 2023 Jul 03
... knowledge of micro architecture and VHDL or verilog. Computer Software Engineering Developing software systems and applications for desktop, mobile, web, and cloud platforms. familiar with JAVA language (Object Oriented Programming. data structure, ... - 2023 Jul 03
Data Analytics Project Management
Austin, TX
... Bus Architecture (AMBA) specification, in Xilinx's Zync device to connect the monitor component in the slave interface of the AXI4 with that on the master interface using the UVM tool and System Verilog, resulting in a lower signal latency. ... - 2023 Jul 01
... Bus Architecture (AMBA) specification, in Xilinx's Zync device to connect the monitor component in the slave interface of the AXI4 with that on the master interface using the UVM tool and System Verilog, resulting in a lower signal latency. ... - 2023 Jul 01
Senior Test Engineer - Hardware, Software and Integration/Design
Wauwatosa, WI, 53213
... Teradyne and LM, 1000 Hardware Modelers, Behavioral Simulation, Synopsis SABER Test Languages: 1750A Assembler, ATLAS, C++, LabView, LabWindows/CVI, PSPICE, SCPI, Teradyne, TestStand, TestStudio, Verilog, MAESTRO, Vmetro/Vanguard Script General ... - 2023 Jun 28
... Teradyne and LM, 1000 Hardware Modelers, Behavioral Simulation, Synopsis SABER Test Languages: 1750A Assembler, ATLAS, C++, LabView, LabWindows/CVI, PSPICE, SCPI, Teradyne, TestStand, TestStudio, Verilog, MAESTRO, Vmetro/Vanguard Script General ... - 2023 Jun 28
Android App Developer
Colorado Springs, CO
... Dagger, Retrofit, GWT MISC TECHNOLOGIES: Verilog, LTSpice, Sensor Design, LogicWorks, Windows, MS Office, Linux, Embedded Systems, Circuit Schematics, Work Experience Senior Android Developer Arrow Electronik Events, Sonitronies S. ... - 2023 Jun 27
... Dagger, Retrofit, GWT MISC TECHNOLOGIES: Verilog, LTSpice, Sensor Design, LogicWorks, Windows, MS Office, Linux, Embedded Systems, Circuit Schematics, Work Experience Senior Android Developer Arrow Electronik Events, Sonitronies S. ... - 2023 Jun 27
Software Engineer Developer
Mesa, AZ
... + Taught to students: Data Structures & Algorithms, Software Quality Assurance & Testing, Java, Verilog, Assembly. Software Engineer, Intel November 2007 – January 2010 + Designed, developed and tested a flexible compiler that programmed a ... - 2023 Jun 26
... + Taught to students: Data Structures & Algorithms, Software Quality Assurance & Testing, Java, Verilog, Assembly. Software Engineer, Intel November 2007 – January 2010 + Designed, developed and tested a flexible compiler that programmed a ... - 2023 Jun 26